Message ID | 1466296268-27099-6-git-send-email-andrew.smirnov@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Hi, [auto build test ERROR on shawnguo/for-next] [also build test ERROR on v4.7-rc3 next-20160617] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Andrey-Smirnov/i-MX-L2-cache-code-cleanups-and-performance-tweaks/20160619-083620 base: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next config: arm-multi_v7_defconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (Debian 5.3.1-8) 5.3.1 20160205 reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm All errors (new ones prefixed by >>): arch/arm/mach-imx/system.c: In function 'imx_init_l2cache': >> arch/arm/mach-imx/system.c:112:10: error: implicit declaration of function 'L310_PREFETCH_CTRL_DBL_' [-Werror=implicit-function-declaration] val |= L310_PREFETCH_CTRL_DBL_ ^ cc1: some warnings being treated as errors vim +/L310_PREFETCH_CTRL_DBL_ +112 arch/arm/mach-imx/system.c 106 goto out; 107 } 108 109 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { 110 /* Configure the L2 PREFETCH and POWER registers */ 111 val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); > 112 val |= L310_PREFETCH_CTRL_DBL_ 113 L310_PREFETCH_CTRL_INSTR_PREFETCH | 114 L310_PREFETCH_CTRL_DATA_PREFETCH | 115 L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index b153376..7ba9dc8 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -109,7 +109,10 @@ void __init imx_init_l2cache(void) if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { /* Configure the L2 PREFETCH and POWER registers */ val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); - val |= 0x70800000; + val |= L310_PREFETCH_CTRL_DBL_ + L310_PREFETCH_CTRL_INSTR_PREFETCH | + L310_PREFETCH_CTRL_DATA_PREFETCH | + L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); }