diff mbox

clk: samsung: exynos5433: use clock_ignore_unused flag for SPI3 related clocks

Message ID 1466151362-2881-1-git-send-email-andi.shyti@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Andi Shyti June 17, 2016, 8:16 a.m. UTC 
From: Jaehoon Chung <jh80.chung@samsung.com>

The SPI 3 bus uses two clocks, a bus clock and an input clock.
Do not disable the clocks when unused in order to allow access to
the SPI 3 device.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
 drivers/clk/samsung/clk-exynos5433.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Tomasz Figa June 18, 2016, 2:31 p.m. UTC | #1 
Hi Andi, Jaehoon,

2016-06-17 17:16 GMT+09:00 Andi Shyti <andi.shyti@samsung.com>:
> From: Jaehoon Chung <jh80.chung@samsung.com>
>
> The SPI 3 bus uses two clocks, a bus clock and an input clock.
> Do not disable the clocks when unused in order to allow access to
> the SPI 3 device.

If unused, why would access to SPI 3 device needed?

Best regards,
Tomasz
Andi Shyti June 19, 2016, 5:59 a.m. UTC | #2 
Hi Tomasz,

> > The SPI 3 bus uses two clocks, a bus clock and an input clock.
> > Do not disable the clocks when unused in order to allow access to
> > the SPI 3 device.
> 
> If unused, why would access to SPI 3 device needed?

because next I will submit a small driver which uses the SPI3.
Actually in the exynos5433 boards all the SPI are used but not all
the drivers are ported to mainline.

Thanks,
Andi
Tomasz Figa June 19, 2016, 1:44 p.m. UTC | #3 
2016-06-19 14:59 GMT+09:00 Andi Shyti <andi@etezian.org>:
> Hi Tomasz,
>
>> > The SPI 3 bus uses two clocks, a bus clock and an input clock.
>> > Do not disable the clocks when unused in order to allow access to
>> > the SPI 3 device.
>>
>> If unused, why would access to SPI 3 device needed?
>
> because next I will submit a small driver which uses the SPI3.
> Actually in the exynos5433 boards all the SPI are used but not all
> the drivers are ported to mainline.

Then shouldn't the driver request the clocks and enable them? Or I'm
missing something obvious? :)

Best regards,
Tomasz
Andi Shyti June 20, 2016, 5:41 a.m. UTC | #4 
Hi Tomasz,

> >> > The SPI 3 bus uses two clocks, a bus clock and an input clock.
> >> > Do not disable the clocks when unused in order to allow access to
> >> > the SPI 3 device.
> >>
> >> If unused, why would access to SPI 3 device needed?
> >
> > because next I will submit a small driver which uses the SPI3.
> > Actually in the exynos5433 boards all the SPI are used but not all
> > the drivers are ported to mainline.
> 
> Then shouldn't the driver request the clocks and enable them? Or I'm
> missing something obvious? :)

the reason is that...

[ from the patch ]

>         GATE(CLK_SCLK_IOCLK_SPI3, "sclk_ioclk_spi3", "ioclk_spi3_clk_in",
> -                       ENABLE_SCLK_PERIC, 20, CLK_SET_RATE_PARENT, 0),
> +                       ENABLE_SCLK_PERIC, 20,
> +                       CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),

... the sclk_ioclk_spi3 is new in exynos5433 and there is no
implementation for enabling/disabling that particular clock...

>         GATE(CLK_SCLK_SPI3, "sclk_spi3", "sclk_spi3_peric", ENABLE_SCLK_PERIC,
> -                       18, CLK_SET_RATE_PARENT, 0),
> +                       18, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),

... while in this case your question makes sense, but it depends
on which clock the device (s3c64xx) is requesting (from the DTS).
In any case, I kept it consistent with the SPI1, which falls in
the same case, as in mainline we don't have any DTS for
exynos5433 (yet!).

Thanks,
Andi
Tomasz Figa June 20, 2016, 9 a.m. UTC | #5 
2016-06-20 14:41 GMT+09:00 Andi Shyti <andi.shyti@samsung.com>:
> Hi Tomasz,
>
>> >> > The SPI 3 bus uses two clocks, a bus clock and an input clock.
>> >> > Do not disable the clocks when unused in order to allow access to
>> >> > the SPI 3 device.
>> >>
>> >> If unused, why would access to SPI 3 device needed?
>> >
>> > because next I will submit a small driver which uses the SPI3.
>> > Actually in the exynos5433 boards all the SPI are used but not all
>> > the drivers are ported to mainline.
>>
>> Then shouldn't the driver request the clocks and enable them? Or I'm
>> missing something obvious? :)
>
> the reason is that...
>
> [ from the patch ]
>
>>         GATE(CLK_SCLK_IOCLK_SPI3, "sclk_ioclk_spi3", "ioclk_spi3_clk_in",
>> -                       ENABLE_SCLK_PERIC, 20, CLK_SET_RATE_PARENT, 0),
>> +                       ENABLE_SCLK_PERIC, 20,
>> +                       CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
>
> ... the sclk_ioclk_spi3 is new in exynos5433 and there is no
> implementation for enabling/disabling that particular clock...

I'm not convinced that it's a good reason to make boards on which SPI3
is unused not gate the clock by default, then. The correct solution
would be to make the SPI driver request this clock and enable it.

>
>>         GATE(CLK_SCLK_SPI3, "sclk_spi3", "sclk_spi3_peric", ENABLE_SCLK_PERIC,
>> -                       18, CLK_SET_RATE_PARENT, 0),
>> +                       18, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
>
> ... while in this case your question makes sense, but it depends
> on which clock the device (s3c64xx) is requesting (from the DTS).
> In any case, I kept it consistent with the SPI1, which falls in
> the same case, as in mainline we don't have any DTS for
> exynos5433 (yet!).

Same here.

In general CLK_IGNORE_UNUSED should be avoided, because the semantics
of CLK_IGNORE_UNUSED are really weak and protect only from
clk_disable_unused(). It doesn't cause the clock to be enabled if it
was disabled at boot-up and it doesn't cause its parents to be enabled
(not even stay enabled if they don't have CLK_IGNORE_UNUSED, but have
gating capability). The only reasonable use case for it that I can
think of now is a display controller that needs certain clocks to
remain running to keep showing something on the screen until the
proper driver is loaded and takes over.

Unfortunately I have to NAK this patch. Please add proper support for
them to the SPI driver.

Best regards,
Tomasz
Andi Shyti June 20, 2016, 10:13 a.m. UTC | #6 
> Unfortunately I have to NAK this patch. Please add proper support for
> them to the SPI driver.

I agree, this is quite a lazy solution.

But your comment is giving me more work than what I was willing
to have, also because in this driver the SPI1 is aslo using
CLK_IGNORE_UNUSED :)

Thanks for your review,
Andi
diff mbox

Patch

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index 128527b..7c1fa09 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -1641,11 +1641,12 @@  static struct samsung_gate_clock peric_gate_clks[] __initdata = {
 	GATE(CLK_SCLK_IOCLK_SPI4, "sclk_ioclk_spi4", "ioclk_spi4_clk_in",
 			ENABLE_SCLK_PERIC, 21, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_IOCLK_SPI3, "sclk_ioclk_spi3", "ioclk_spi3_clk_in",
-			ENABLE_SCLK_PERIC, 20, CLK_SET_RATE_PARENT, 0),
+			ENABLE_SCLK_PERIC, 20,
+			CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_SPI4, "sclk_spi4", "sclk_spi4_peric", ENABLE_SCLK_PERIC,
 			19, CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_SPI3, "sclk_spi3", "sclk_spi3_peric", ENABLE_SCLK_PERIC,
-			18, CLK_SET_RATE_PARENT, 0),
+			18, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
 	GATE(CLK_SCLK_SCI, "sclk_sci", "div_sclk_sci", ENABLE_SCLK_PERIC,
 			17, 0, 0),
 	GATE(CLK_SCLK_SC_IN, "sclk_sc_in", "div_sclk_sc_in", ENABLE_SCLK_PERIC,