[v2,2/3] ast2400: Integrate the SCU model and set silicon revision

Commit Message

Andrew Jeffery June 23, 2016, 2:15 a.m. UTC

By specifying the silicon revision we select the appropriate reset
values for the SoC.

Additionally, expose hardware strapping properties aliasing those
provided by the SCU for board-specific configuration.

Signed-off-by: Andrew Jeffery <[e-mail]>
---

Since v1:

* Remove reset value configuration
* Configure SoC silicon revision in the SCU via property
* Alias the SCU's hardware strapping properties to expose them to boards

 hw/arm/ast2400.c         | 17 +++++++++++++++++
 include/hw/arm/ast2400.h |  2 ++
 2 files changed, 19 insertions(+)

Comments

Cédric Le Goater June 23, 2016, 6:28 a.m. UTC | #1

On 06/23/2016 04:15 AM, Andrew Jeffery wrote:
> By specifying the silicon revision we select the appropriate reset
> values for the SoC.
> 
> Additionally, expose hardware strapping properties aliasing those
> provided by the SCU for board-specific configuration.
> 
> Signed-off-by: Andrew Jeffery <[e-mail]>
> ---


Reviewed-by: Cédric Le Goater <[e-mail]>

Thanks,

C.

Peter Maydell June 23, 2016, 5:38 p.m. UTC | #2

On 23 June 2016 at 03:15, Andrew Jeffery <[e-mail]> wrote:
> By specifying the silicon revision we select the appropriate reset
> values for the SoC.
>
> Additionally, expose hardware strapping properties aliasing those
> provided by the SCU for board-specific configuration.
>
> Signed-off-by: Andrew Jeffery <[e-mail]>
> ---

Reviewed-by: Peter Maydell <[e-mail]>

thanks
-- PMM

Patch

diff --git a/hw/arm/ast2400.c b/hw/arm/ast2400.c
index 4a9de0e10cbc..1a26d74e695c 100644
--- a/hw/arm/ast2400.c
+++ b/hw/arm/ast2400.c
@@ -24,6 +24,7 @@ 
 #define AST2400_IOMEM_SIZE       0x00200000
 #define AST2400_IOMEM_BASE       0x1E600000
 #define AST2400_VIC_BASE         0x1E6C0000
+#define AST2400_SCU_BASE         0x1E6E2000
 #define AST2400_TIMER_BASE       0x1E782000
 #define AST2400_I2C_BASE         0x1E78A000
 
@@ -72,6 +73,14 @@  static void ast2400_init(Object *obj)
     object_initialize(&s->i2c, sizeof(s->i2c), TYPE_ASPEED_I2C);
     object_property_add_child(obj, "i2c", OBJECT(&s->i2c), NULL);
     qdev_set_parent_bus(DEVICE(&s->i2c), sysbus_get_default());
+
+    object_initialize(&s->scu, sizeof(s->scu), TYPE_ASPEED_SCU);
+    object_property_add_child(obj, "scu", OBJECT(&s->scu), NULL);
+    qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default());
+    object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu),
+                              "hw-strap1", &error_abort);
+    object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu),
+                              "hw-strap2", &error_abort);
 }
 
 static void ast2400_realize(DeviceState *dev, Error **errp)
@@ -110,6 +119,14 @@  static void ast2400_realize(DeviceState *dev, Error **errp)
         sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
     }
 
+    /* SCU */
+    object_property_set_bool(OBJECT(&s->scu), true, "realized", &err);
+    if (err) {
+        error_propagate(errp, err);
+        return;
+    }
+    sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, AST2400_SCU_BASE);
+
     /* UART - attach an 8250 to the IO space as our UART5 */
     if (serial_hds[0]) {
         qemu_irq uart5 = qdev_get_gpio_in(DEVICE(&s->vic), uart_irqs[4]);
diff --git a/include/hw/arm/ast2400.h b/include/hw/arm/ast2400.h
index c05ed5376736..f1a64fd3893d 100644
--- a/include/hw/arm/ast2400.h
+++ b/include/hw/arm/ast2400.h
@@ -14,6 +14,7 @@ 
 
 #include "hw/arm/arm.h"
 #include "hw/intc/aspeed_vic.h"
+#include "hw/misc/aspeed_scu.h"
 #include "hw/timer/aspeed_timer.h"
 #include "hw/i2c/aspeed_i2c.h"
 
@@ -27,6 +28,7 @@  typedef struct AST2400State {
     AspeedVICState vic;
     AspeedTimerCtrlState timerctrl;
     AspeedI2CState i2c;
+    AspeedSCUState scu;
 } AST2400State;
 
 #define TYPE_AST2400 "ast2400"