| Message ID | 5274cc806888a709c639e701dad894543885b2c9.1468985673.git.apronin@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote: > Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50 > firmware. Several timing-related properties that may differ from > one firmware version to another are added to devicetree. > Document these properties. > > Signed-off-by: Andrey Pronin <apronin@chromium.org> > --- > .../devicetree/bindings/security/tpm/cr50_spi.txt | 32 ++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/security/tpm/cr50_spi.txt > > diff --git a/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt b/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt > new file mode 100644 > index 0000000..f212b6b > --- /dev/null > +++ b/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt > @@ -0,0 +1,32 @@ > +* H1 Secure Microcontroller with Cr50 Firmware on SPI Bus. > + > +H1 Secure Microcontroller running Cr50 firmware provides several > +functions, including TPM-like functionality. It communicates over > +SPI using the FIFO protocol described in the PTP Spec, section 6. > + > +Required properties: > +- compatible: Should be "google,cr50". > +- spi-max-frequency: Maximum SPI frequency. > + > +Optional properties: > +- access-delay-ms: Required delay between subsequent transactions on SPI. As I mentioned, there may be common properties. It doesn't seem you looked, so I did: - spi-rx-delay-us - (optional) Microsecond delay after a read transfer. - spi-tx-delay-us - (optional) Microsecond delay after a write transfer. Seems to me setting one or both of these should work for you. > +- sleep-delay-ms: Time after the last SPI activity, after which the chip > + may go to sleep. > +- wake-start-delay-ms: Time after initiating wake up before the chip is > + ready to accept commands over SPI. I also asked why these 2 can't be hard-coded in the driver? > + > +Example: > + > +&spi0 { > + status = "okay"; > + > + cr50@0 { > + compatible = "google,cr50"; > + reg = <0>; > + spi-max-frequency = <800000>; > + > + access-delay-ms = <2>; > + sleep-delay-ms = <1000>; > + wake-start-delay-ms = <60>; > + }; > +}; > -- > 2.6.6 > ------------------------------------------------------------------------------ What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports.http://sdm.link/zohodev2dev
On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote: > On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote: Hi Rob, > As I mentioned, there may be common properties. It doesn't seem you > looked, so I did: > > - spi-rx-delay-us - (optional) Microsecond delay after a read transfer. > - spi-tx-delay-us - (optional) Microsecond delay after a write transfer. > > Seems to me setting one or both of these should work for you. > Yes, good catch, my fault I didn't see those. But they are not exactly what I mean and need. I don't need delay after each read or write transfer. What is needed is a guaranteed time between transfers. So, if the next transaction doesn't come withing the next X ms (or us), we don't waste time on inserting a delays after this transaction at all. Following the description and always inserting a delay must work well for short microseconds-long delays. For longer milliseconds-long delays a different strategy of checking the time when the previous transaction was and only delaying if it was not too long ago is better. Thus, I won't be able to re-use these properties anyways based on their current description in bindings/spi/spi-bus.txt. > > +- sleep-delay-ms: Time after the last SPI activity, after which the chip > > + may go to sleep. > > +- wake-start-delay-ms: Time after initiating wake up before the chip is > > + ready to accept commands over SPI. > > I also asked why these 2 can't be hard-coded in the driver? > Sorry, I just updated this patch description in v2 to indicate why they are not hard-coded, but didn't answer explicitly. As the firmware changes, a different revision of it can have a different time before it sleeps in its configuration, or the time it takes it to startup may be different. Thus, there's a way to set it here w/o changing the driver. Andrey ------------------------------------------------------------------------------ What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports.http://sdm.link/zohodev2dev
On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote: > Sorry, I just updated this patch description in v2 to indicate why they are not > hard-coded, but didn't answer explicitly. As the firmware changes, a different > revision of it can have a different time before it sleeps in its configuration, > or the time it takes it to startup may be different. Thus, there's a way to > set it here w/o changing the driver. This sort of stuff should be read out of the firmware, not DT.. Why has Google created such a non-standard TPM firmware??? Jason ------------------------------------------------------------------------------ What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports.http://sdm.link/zohodev2dev
On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote: > On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote: > > On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote: > > Hi Rob, > > > As I mentioned, there may be common properties. It doesn't seem you > > looked, so I did: > > > > - spi-rx-delay-us - (optional) Microsecond delay after a read transfer. > > - spi-tx-delay-us - (optional) Microsecond delay after a write transfer. > > > > Seems to me setting one or both of these should work for you. > > > > Yes, good catch, my fault I didn't see those. > But they are not exactly what I mean and need. I don't need delay after > each read or write transfer. What is needed is a guaranteed time > between transfers. > > So, if the next transaction doesn't come withing the next X ms (or us), > we don't waste time on inserting a delays after this transaction at all. > Following the description and always inserting a delay must work well > for short microseconds-long delays. For longer milliseconds-long delays > a different strategy of checking the time when the previous transaction > was and only delaying if it was not too long ago is better. I'd guess that the intent is the same for all. A simple delay is just much easier to implement. I would think implementing the more sophisticated algorithm would work for all users. Perhaps with some threshold for a simple delay. > Thus, I won't be able to re-use these properties anyways based on their > current description in bindings/spi/spi-bus.txt. > > > > +- sleep-delay-ms: Time after the last SPI activity, after which the chip > > > + may go to sleep. > > > +- wake-start-delay-ms: Time after initiating wake up before the chip is > > > + ready to accept commands over SPI. > > > > I also asked why these 2 can't be hard-coded in the driver? > > > > Sorry, I just updated this patch description in v2 to indicate why they are not > hard-coded, but didn't answer explicitly. As the firmware changes, a different > revision of it can have a different time before it sleeps in its configuration, > or the time it takes it to startup may be different. Thus, there's a way to > set it here w/o changing the driver. The firmware and DT may not be updated in sync especially if you are loading the firmware from the rootfs. Are you doing DT and firmware updates without changing the kernel? Rob ------------------------------------------------------------------------------ What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports.http://sdm.link/zohodev2dev
On Thu, Jul 21, 2016 at 04:03:12PM -0500, Rob Herring wrote: > On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote: > > On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote: > > > On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote: > > > > Hi Rob, > > > > > As I mentioned, there may be common properties. It doesn't seem you > > > looked, so I did: > > > > > > - spi-rx-delay-us - (optional) Microsecond delay after a read transfer. > > > - spi-tx-delay-us - (optional) Microsecond delay after a write transfer. > > > > > > Seems to me setting one or both of these should work for you. > > > > > > > Yes, good catch, my fault I didn't see those. > > But they are not exactly what I mean and need. I don't need delay after > > each read or write transfer. What is needed is a guaranteed time > > between transfers. > > > > So, if the next transaction doesn't come withing the next X ms (or us), > > we don't waste time on inserting a delays after this transaction at all. > > Following the description and always inserting a delay must work well > > for short microseconds-long delays. For longer milliseconds-long delays > > a different strategy of checking the time when the previous transaction > > was and only delaying if it was not too long ago is better. > > I'd guess that the intent is the same for all. A simple delay is > just much easier to implement. I would think implementing the more > sophisticated algorithm would work for all users. Perhaps with some > threshold for a simple delay. > > > Thus, I won't be able to re-use these properties anyways based on their > > current description in bindings/spi/spi-bus.txt. > > > > > > +- sleep-delay-ms: Time after the last SPI activity, after which the chip > > > > + may go to sleep. > > > > +- wake-start-delay-ms: Time after initiating wake up before the chip is > > > > + ready to accept commands over SPI. > > > > > > I also asked why these 2 can't be hard-coded in the driver? > > > > > > > Sorry, I just updated this patch description in v2 to indicate why they are not > > hard-coded, but didn't answer explicitly. As the firmware changes, a different > > revision of it can have a different time before it sleeps in its configuration, > > or the time it takes it to startup may be different. Thus, there's a way to > > set it here w/o changing the driver. > > The firmware and DT may not be updated in sync especially if you are > loading the firmware from the rootfs. Are you doing DT and firmware > updates without changing the kernel? > > Rob Hi Rob, Thanks for the feedback. I will hard-code those parameters in the driver instead of reading from DT. Thanks, Andrey ------------------------------------------------------------------------------
On Wed, Jul 20, 2016 at 01:54:22PM -0600, Jason Gunthorpe wrote: > On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote: > > > Sorry, I just updated this patch description in v2 to indicate why they are not > > hard-coded, but didn't answer explicitly. As the firmware changes, a different > > revision of it can have a different time before it sleeps in its configuration, > > or the time it takes it to startup may be different. Thus, there's a way to > > set it here w/o changing the driver. > > This sort of stuff should be read out of the firmware, not DT.. > > Why has Google created such a non-standard TPM firmware??? > > Jason Thanks, Jason. Will hard-code those in the driver instead of reading from DT. Andrey ------------------------------------------------------------------------------
diff --git a/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt b/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt new file mode 100644 index 0000000..f212b6b --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/cr50_spi.txt @@ -0,0 +1,32 @@ +* H1 Secure Microcontroller with Cr50 Firmware on SPI Bus. + +H1 Secure Microcontroller running Cr50 firmware provides several +functions, including TPM-like functionality. It communicates over +SPI using the FIFO protocol described in the PTP Spec, section 6. + +Required properties: +- compatible: Should be "google,cr50". +- spi-max-frequency: Maximum SPI frequency. + +Optional properties: +- access-delay-ms: Required delay between subsequent transactions on SPI. +- sleep-delay-ms: Time after the last SPI activity, after which the chip + may go to sleep. +- wake-start-delay-ms: Time after initiating wake up before the chip is + ready to accept commands over SPI. + +Example: + +&spi0 { + status = "okay"; + + cr50@0 { + compatible = "google,cr50"; + reg = <0>; + spi-max-frequency = <800000>; + + access-delay-ms = <2>; + sleep-delay-ms = <1000>; + wake-start-delay-ms = <60>; + }; +};
Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50 firmware. Several timing-related properties that may differ from one firmware version to another are added to devicetree. Document these properties. Signed-off-by: Andrey Pronin <apronin@chromium.org> --- .../devicetree/bindings/security/tpm/cr50_spi.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/security/tpm/cr50_spi.txt