diff mbox

[v2,1/2] drm/i915/backlight: setup and cache pwm alternate increment value

Message ID D42A2A322A1FCA4089E30E9A9BA36AC60C214F4A@PGSMSX102.gar.corp.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Lee, Shawn C Sept. 19, 2016, 9:18 a.m. UTC
PWM was enabled in bios. i915 driver will save max duty to panel->backlight.max.
So *_hz_to_pwm will not be called if backlight.max not zero. 

	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
	panel->backlight.max = pch_ctl2 >> 16;

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

-----Original Message-----
From: Nikula, Jani 
Sent: Monday, September 19, 2016 4:24 PM
To: intel-gfx@lists.freedesktop.org
Cc: Nikula, Jani <jani.nikula@intel.com>; Lee, Shawn C <shawn.c.lee@intel.com>
Subject: [PATCH v2 1/2] drm/i915/backlight: setup and cache pwm alternate increment value

This will also be needed later on when setting up the alternate increment in backlight enable.

Cc: Shawn Lee <shawn.c.lee@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h   |  1 +
 drivers/gpu/drm/i915/intel_panel.c | 14 +++++++++++---
 2 files changed, 12 insertions(+), 3 deletions(-)

 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_panel *panel = &connector->panel;
 	u32 mul, clock;
 
-	if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
+	if (panel->backlight.alternate_pwm_increment)
 		mul = 16;
 	else
 		mul = 128;
@@ -1414,6 +1415,13 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_panel *panel = &connector->panel;
 	u32 pch_ctl1, pch_ctl2, val;
+	bool alt;
+
+	if (HAS_PCH_LPT(dev_priv))
+		alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
+	else
+		alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
+	panel->backlight.alternate_pwm_increment = alt;
 
 	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
 	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
--
2.1.4

Comments

Jani Nikula Sept. 19, 2016, 9:20 a.m. UTC | #1
On Mon, 19 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote:
> PWM was enabled in bios. i915 driver will save max duty to panel->backlight.max.
> So *_hz_to_pwm will not be called if backlight.max not zero. 

And what difference does it make?

BR,
Jani.

>
> 	pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
> 	panel->backlight.max = pch_ctl2 >> 16;
>
> 	if (!panel->backlight.max)
> 		panel->backlight.max = get_backlight_max_vbt(connector);
>
> -----Original Message-----
> From: Nikula, Jani 
> Sent: Monday, September 19, 2016 4:24 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Lee, Shawn C <shawn.c.lee@intel.com>
> Subject: [PATCH v2 1/2] drm/i915/backlight: setup and cache pwm alternate increment value
>
> This will also be needed later on when setting up the alternate increment in backlight enable.
>
> Cc: Shawn Lee <shawn.c.lee@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_drv.h   |  1 +
>  drivers/gpu/drm/i915/intel_panel.c | 14 +++++++++++---
>  2 files changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 8fd16adf069b..c3e65e515c9d 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -263,6 +263,7 @@ struct intel_panel {
>  		bool enabled;
>  		bool combination_mode;	/* gen 2/4 only */
>  		bool active_low_pwm;
> +		bool alternate_pwm_increment;	/* lpt+ */
>  
>  		/* PWM chip */
>  		bool util_pin_active_low;	/* bxt+ */
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index c10e9b0405e8..8bc43205d6a0 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1242,10 +1242,10 @@ static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
>   */
>  static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)  {
> -	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> +	struct intel_panel *panel = &connector->panel;
>  	u32 mul;
>  
> -	if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
> +	if (panel->backlight.alternate_pwm_increment)
>  		mul = 128;
>  	else
>  		mul = 16;
> @@ -1261,9 +1261,10 @@ static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)  static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)  {
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> +	struct intel_panel *panel = &connector->panel;
>  	u32 mul, clock;
>  
> -	if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
> +	if (panel->backlight.alternate_pwm_increment)
>  		mul = 16;
>  	else
>  		mul = 128;
> @@ -1414,6 +1415,13 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	struct intel_panel *panel = &connector->panel;
>  	u32 pch_ctl1, pch_ctl2, val;
> +	bool alt;
> +
> +	if (HAS_PCH_LPT(dev_priv))
> +		alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
> +	else
> +		alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
> +	panel->backlight.alternate_pwm_increment = alt;
>  
>  	pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
>  	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
> --
> 2.1.4
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8fd16adf069b..c3e65e515c9d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -263,6 +263,7 @@  struct intel_panel {
 		bool enabled;
 		bool combination_mode;	/* gen 2/4 only */
 		bool active_low_pwm;
+		bool alternate_pwm_increment;	/* lpt+ */
 
 		/* PWM chip */
 		bool util_pin_active_low;	/* bxt+ */
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index c10e9b0405e8..8bc43205d6a0 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1242,10 +1242,10 @@  static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  */
 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)  {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_panel *panel = &connector->panel;
 	u32 mul;
 
-	if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
+	if (panel->backlight.alternate_pwm_increment)
 		mul = 128;
 	else
 		mul = 16;
@@ -1261,9 +1261,10 @@  static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)  static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)  {