| Message ID | 1474278984-16651-1-git-send-email-shawn.c.lee@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 19 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote: > From: "Lee, Shawn C" <shawn.c.lee@intel.com> > > SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity > (minimum increment) of the PWM backlight control counter. PWM frequency > adjustment on 128 clock increments when this bit was 1. And 16 clock > increments when it was 0. > > PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to > SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save > SOUTH_CHICKEN1 register value before suspend. And will restore > it after i915 resume. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486 Shawn, I already updated the patch. Perhaps I jumped the gun but I was expecting an update and didn't get one and wanted to move this forward. That patch still has your authorship [1]. This one still has issues. BR, Jani. [1] http://patchwork.freedesktop.org/patch/msgid/1474273457-31680-2-git-send-email-jani.nikula@intel.com > > Cc: Jani Nikula <jani.nikula@intel.com> > Reviewed-by: Cooper Chiou <cooper.chiou@intel.com> > Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com> > Reviewed-by: Gary C Wang <gary.c.wang@intel.com> > Signed-off-by: Shawn Lee <shawn.c.lee@intel.com> > --- > drivers/gpu/drm/i915/intel_drv.h | 1 + > drivers/gpu/drm/i915/intel_panel.c | 30 ++++++++++++++++++++++++++++-- > 2 files changed, 29 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 570a7ca..c4bc690 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -256,6 +256,7 @@ struct intel_panel { > u32 level; > u32 min; > u32 max; > + bool pwm_alternate_increment; > bool enabled; > bool combination_mode; /* gen 2/4 only */ > bool active_low_pwm; > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index c10e9b0..6f8469b 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector) > { > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > struct intel_panel *panel = &connector->panel; > - u32 pch_ctl1, pch_ctl2; > + u32 pch_ctl1, pch_ctl2, mul; > > pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); > if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { > @@ -867,6 +867,22 @@ static void lpt_enable_backlight(struct intel_connector *connector) > > /* This won't stick until the above enable. */ > intel_panel_actually_set_backlight(connector, panel->backlight.level); > + > + if (HAS_PCH_LPT(dev_priv)) { > + mul = I915_READ(SOUTH_CHICKEN2); > + if (panel->backlight.pwm_alternate_increment) > + mul |= LPT_PWM_GRANULARITY; > + else > + mul &= ~LPT_PWM_GRANULARITY; > + I915_WRITE(SOUTH_CHICKEN2, mul); > + } else { > + mul = I915_READ(SOUTH_CHICKEN1); > + if (panel->backlight.pwm_alternate_increment) > + mul |= SPT_PWM_GRANULARITY; > + else > + mul &= ~SPT_PWM_GRANULARITY; > + I915_WRITE(SOUTH_CHICKEN1, mul); > + } > } > > static void pch_enable_backlight(struct intel_connector *connector) > @@ -1413,7 +1429,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus > { > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > struct intel_panel *panel = &connector->panel; > - u32 pch_ctl1, pch_ctl2, val; > + u32 pch_ctl1, pch_ctl2, val, mul; > > pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); > panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; > @@ -1436,6 +1452,16 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus > > panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; > > + if (HAS_PCH_LPT(dev_priv)) > + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; > + else > + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; > + > + if ( mul ) > + panel->backlight.pwm_alternate_increment = true; > + else > + panel->backlight.pwm_alternate_increment = false; > + > return 0; > }
Understood. Thanks! -----Original Message----- From: Nikula, Jani Sent: Monday, September 19, 2016 5:43 PM To: Lee, Shawn C <shawn.c.lee@intel.com>; intel-gfx@lists.freedesktop.org Cc: Lee, Shawn C <shawn.c.lee@intel.com> Subject: Re: [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume On Mon, 19 Sep 2016, "Lee, Shawn C" <shawn.c.lee@intel.com> wrote: > From: "Lee, Shawn C" <shawn.c.lee@intel.com> > > SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity > (minimum increment) of the PWM backlight control counter. PWM > frequency adjustment on 128 clock increments when this bit was 1. And > 16 clock increments when it was 0. > > PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to > SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save > SOUTH_CHICKEN1 register value before suspend. And will restore it > after i915 resume. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486 Shawn, I already updated the patch. Perhaps I jumped the gun but I was expecting an update and didn't get one and wanted to move this forward. That patch still has your authorship [1]. This one still has issues. BR, Jani. [1] http://patchwork.freedesktop.org/patch/msgid/1474273457-31680-2-git-send-email-jani.nikula@intel.com > > Cc: Jani Nikula <jani.nikula@intel.com> > Reviewed-by: Cooper Chiou <cooper.chiou@intel.com> > Reviewed-by: Wei Shun Chen <wei.shun.chang@intel.com> > Reviewed-by: Gary C Wang <gary.c.wang@intel.com> > Signed-off-by: Shawn Lee <shawn.c.lee@intel.com> > --- > drivers/gpu/drm/i915/intel_drv.h | 1 + > drivers/gpu/drm/i915/intel_panel.c | 30 ++++++++++++++++++++++++++++-- > 2 files changed, 29 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_drv.h > b/drivers/gpu/drm/i915/intel_drv.h > index 570a7ca..c4bc690 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -256,6 +256,7 @@ struct intel_panel { > u32 level; > u32 min; > u32 max; > + bool pwm_alternate_increment; > bool enabled; > bool combination_mode; /* gen 2/4 only */ > bool active_low_pwm; > diff --git a/drivers/gpu/drm/i915/intel_panel.c > b/drivers/gpu/drm/i915/intel_panel.c > index c10e9b0..6f8469b 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct > intel_connector *connector) { > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > struct intel_panel *panel = &connector->panel; > - u32 pch_ctl1, pch_ctl2; > + u32 pch_ctl1, pch_ctl2, mul; > > pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); > if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { @@ -867,6 +867,22 @@ static > void lpt_enable_backlight(struct intel_connector *connector) > > /* This won't stick until the above enable. */ > intel_panel_actually_set_backlight(connector, > panel->backlight.level); > + > + if (HAS_PCH_LPT(dev_priv)) { > + mul = I915_READ(SOUTH_CHICKEN2); > + if (panel->backlight.pwm_alternate_increment) > + mul |= LPT_PWM_GRANULARITY; > + else > + mul &= ~LPT_PWM_GRANULARITY; > + I915_WRITE(SOUTH_CHICKEN2, mul); > + } else { > + mul = I915_READ(SOUTH_CHICKEN1); > + if (panel->backlight.pwm_alternate_increment) > + mul |= SPT_PWM_GRANULARITY; > + else > + mul &= ~SPT_PWM_GRANULARITY; > + I915_WRITE(SOUTH_CHICKEN1, mul); > + } > } > > static void pch_enable_backlight(struct intel_connector *connector) > @@ -1413,7 +1429,7 @@ static int lpt_setup_backlight(struct > intel_connector *connector, enum pipe unus { > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > struct intel_panel *panel = &connector->panel; > - u32 pch_ctl1, pch_ctl2, val; > + u32 pch_ctl1, pch_ctl2, val, mul; > > pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); > panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; @@ > -1436,6 +1452,16 @@ static int lpt_setup_backlight(struct > intel_connector *connector, enum pipe unus > > panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; > > + if (HAS_PCH_LPT(dev_priv)) > + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; > + else > + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; > + > + if ( mul ) > + panel->backlight.pwm_alternate_increment = true; > + else > + panel->backlight.pwm_alternate_increment = false; > + > return 0; > } -- Jani Nikula, Intel Open Source Technology Center
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 570a7ca..c4bc690 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -256,6 +256,7 @@ struct intel_panel { u32 level; u32 min; u32 max; + bool pwm_alternate_increment; bool enabled; bool combination_mode; /* gen 2/4 only */ bool active_low_pwm; diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index c10e9b0..6f8469b 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector) { struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_panel *panel = &connector->panel; - u32 pch_ctl1, pch_ctl2; + u32 pch_ctl1, pch_ctl2, mul; pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { @@ -867,6 +867,22 @@ static void lpt_enable_backlight(struct intel_connector *connector) /* This won't stick until the above enable. */ intel_panel_actually_set_backlight(connector, panel->backlight.level); + + if (HAS_PCH_LPT(dev_priv)) { + mul = I915_READ(SOUTH_CHICKEN2); + if (panel->backlight.pwm_alternate_increment) + mul |= LPT_PWM_GRANULARITY; + else + mul &= ~LPT_PWM_GRANULARITY; + I915_WRITE(SOUTH_CHICKEN2, mul); + } else { + mul = I915_READ(SOUTH_CHICKEN1); + if (panel->backlight.pwm_alternate_increment) + mul |= SPT_PWM_GRANULARITY; + else + mul &= ~SPT_PWM_GRANULARITY; + I915_WRITE(SOUTH_CHICKEN1, mul); + } } static void pch_enable_backlight(struct intel_connector *connector) @@ -1413,7 +1429,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus { struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_panel *panel = &connector->panel; - u32 pch_ctl1, pch_ctl2, val; + u32 pch_ctl1, pch_ctl2, val, mul; pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; @@ -1436,6 +1452,16 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; + if (HAS_PCH_LPT(dev_priv)) + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; + else + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; + + if ( mul ) + panel->backlight.pwm_alternate_increment = true; + else + panel->backlight.pwm_alternate_increment = false; + return 0; }