| Message ID | 1474448759-24482-2-git-send-email-mw@semihalf.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 09/21, Marcin Wojtas wrote: > Armada CP110 system controller comprises its own routine responsble > for registering gate clocks. Among others 'flags' field in > struct clk_init_data was not set, using a random values, which > may cause an unpredicted behavior. > > This patch fixes the problem by resetting all fields of clk_init_data > before assigning values for all gated clocks of Armada 7k/8k SoCs family. > > Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...") > Signed-off-by: Marcin Wojtas <mw@semihalf.com> > CC: <stable@vger.kernel.org> > --- Applied to clk-next
diff --git a/drivers/clk/mvebu/cp110-system-controller.c b/drivers/clk/mvebu/cp110-system-controller.c index 7fa42d6..59fe76e 100644 --- a/drivers/clk/mvebu/cp110-system-controller.c +++ b/drivers/clk/mvebu/cp110-system-controller.c @@ -142,6 +142,8 @@ static struct clk *cp110_register_gate(const char *name, if (!gate) return ERR_PTR(-ENOMEM); + memset(&init, 0, sizeof(init)); + init.name = name; init.ops = &cp110_gate_ops; init.parent_names = &parent_name;
Armada CP110 system controller comprises its own routine responsble for registering gate clocks. Among others 'flags' field in struct clk_init_data was not set, using a random values, which may cause an unpredicted behavior. This patch fixes the problem by resetting all fields of clk_init_data before assigning values for all gated clocks of Armada 7k/8k SoCs family. Fixes: d3da3eaef7f4 ("clk: mvebu: new driver for Armada CP110 system ...") Signed-off-by: Marcin Wojtas <mw@semihalf.com> CC: <stable@vger.kernel.org> --- drivers/clk/mvebu/cp110-system-controller.c | 2 ++ 1 file changed, 2 insertions(+)