| Message ID | 20161004125607.10569-4-mugunthanvnm@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote: > The default impedance settings of the phy is not the optimal > value, due to this the second ethernet is not working. Fix it > with correct values which makes the second ethernet port to work. > > Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> > --- > arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts > index f9cfd3b..d626cd7 100644 > --- a/arch/arm/boot/dts/dra72-evm-revc.dts > +++ b/arch/arm/boot/dts/dra72-evm-revc.dts > @@ -62,6 +62,7 @@ > ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; > ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>; > ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; > + ti,min-output-imepdance; s/imepdance/impedance > }; > > dp83867_1: ethernet-phy@3 { > @@ -69,5 +70,6 @@ > ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; > ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>; > ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; > + ti,min-output-imepdance; same here. Thanks and regards, Lokesh > }; > }; >
On Tue, Oct 04, 2016 at 06:26:06PM +0530, Mugunthan V N wrote: > The default impedance settings of the phy is not the optimal > value, due to this the second ethernet is not working. Fix it > with correct values which makes the second ethernet port to work. > > Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> > --- > arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts > index f9cfd3b..d626cd7 100644 > --- a/arch/arm/boot/dts/dra72-evm-revc.dts > +++ b/arch/arm/boot/dts/dra72-evm-revc.dts > @@ -62,6 +62,7 @@ > ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; > ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>; > ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; > + ti,min-output-imepdance; And there is my answer :-( Andrew
On Tuesday 04 October 2016 06:41 PM, Lokesh Vutla wrote: > > On Tuesday 04 October 2016 06:26 PM, Mugunthan V N wrote: >> > The default impedance settings of the phy is not the optimal >> > value, due to this the second ethernet is not working. Fix it >> > with correct values which makes the second ethernet port to work. >> > >> > Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> >> > --- >> > arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ >> > 1 file changed, 2 insertions(+) >> > >> > diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts >> > index f9cfd3b..d626cd7 100644 >> > --- a/arch/arm/boot/dts/dra72-evm-revc.dts >> > +++ b/arch/arm/boot/dts/dra72-evm-revc.dts >> > @@ -62,6 +62,7 @@ >> > ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; >> > ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>; >> > ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; >> > + ti,min-output-imepdance; > s/imepdance/impedance > Thanks for quick catch. Will fix this in v3. Regards Mugunthan V N
diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts index f9cfd3b..d626cd7 100644 --- a/arch/arm/boot/dts/dra72-evm-revc.dts +++ b/arch/arm/boot/dts/dra72-evm-revc.dts @@ -62,6 +62,7 @@ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; + ti,min-output-imepdance; }; dp83867_1: ethernet-phy@3 { @@ -69,5 +70,6 @@ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; + ti,min-output-imepdance; }; };
The default impedance settings of the phy is not the optimal value, due to this the second ethernet is not working. Fix it with correct values which makes the second ethernet port to work. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> --- arch/arm/boot/dts/dra72-evm-revc.dts | 2 ++ 1 file changed, 2 insertions(+)