| Message ID | 1474460512-31994-8-git-send-email-absahu@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Stephen Boyd |
| Headers | show |
On 09/21, Abhishek Sahu wrote: > The current I2C freq table uses MND values which is not > applicable for I2C since its RCG does not have MND > counter. This patch updates the freq table for 19.05 > MHz clk frequency with FEPLL_200 parent. That's concerning given that we read the registers, but I guess it works out? > > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> > --- Applied to clk-next
diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c index a2809db..314aa35 100644 --- a/drivers/clk/qcom/gcc-ipq4019.c +++ b/drivers/clk/qcom/gcc-ipq4019.c @@ -225,8 +225,7 @@ static struct clk_branch gcc_audio_pwm_clk = { }; static const struct freq_tbl ftbl_gcc_blsp1_qup1_2_i2c_apps_clk[] = { - F(19200000, P_XO, 1, 2, 5), - F(24000000, P_XO, 1, 1, 2), + F(19050000, P_FEPLL200, 10.5, 1, 1), { } };
The current I2C freq table uses MND values which is not applicable for I2C since its RCG does not have MND counter. This patch updates the freq table for 19.05 MHz clk frequency with FEPLL_200 parent. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> --- drivers/clk/qcom/gcc-ipq4019.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)