Message ID | 2564fe18eb9cc8a0a1a3311cdf7e7141f35211bd.1481651244.git-series.gregory.clement@free-electrons.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Dec 13, 2016 at 06:48:40PM +0100, Gregory CLEMENT wrote: > diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > index 7b6136182ad0..181e8c5de3bf 100644 > --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > @@ -229,6 +229,15 @@ > > }; > > + ap_sdhci0: sdhci@6e0000 { > + compatible = "marvell,armada-7000-sdhci"; > + reg = <0x6e0000 0x300>; > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "core"; > + clocks = <&cpm_syscon0 1 4>; This seems to be the wrong clock - how can the AP SDHCI core be connected to the CPM syscon (which is on a different die.) I think you first need a patch to add this clock to the AP syscon... Thanks.
On Tue, Dec 13, 2016 at 06:48:40PM +0100, Gregory CLEMENT wrote: > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > index e5e3ed678b6f..035b2b2fc9ca 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > @@ -164,6 +164,16 @@ > clocks = <&cpm_syscon0 1 21>; > status = "disabled"; > }; > + > + cpm_sdhci0: sdhci@780000 { > + compatible = "marvell,armada-7000-sdhci"; > + reg = <0x780000 0x300>; > + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "core"; > + clocks = <&cpm_syscon0 1 4>; > + status = "disabled"; > + }; > + Oh, and a nitpick, since I've already commented on this patch - there's a needless extra blank line here...
Hello, On Thu, 22 Dec 2016 10:45:02 +0000, Russell King - ARM Linux wrote: > On Tue, Dec 13, 2016 at 06:48:40PM +0100, Gregory CLEMENT wrote: > > diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > > index 7b6136182ad0..181e8c5de3bf 100644 > > --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > > +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > > @@ -229,6 +229,15 @@ > > > > }; > > > > + ap_sdhci0: sdhci@6e0000 { > > + compatible = "marvell,armada-7000-sdhci"; > > + reg = <0x6e0000 0x300>; > > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > > + clock-names = "core"; > > + clocks = <&cpm_syscon0 1 4>; > > This seems to be the wrong clock - how can the AP SDHCI core be connected > to the CPM syscon (which is on a different die.) Agreed. This cannot be the right clock. Thomas
On Tue, Dec 13, 2016 at 06:48:40PM +0100, Gregory CLEMENT wrote: > diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > index 7b6136182ad0..181e8c5de3bf 100644 > --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi > @@ -229,6 +229,15 @@ > > }; > > + ap_sdhci0: sdhci@6e0000 { > + compatible = "marvell,armada-7000-sdhci"; > + reg = <0x6e0000 0x300>; > + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "core"; > + clocks = <&cpm_syscon0 1 4>; > + status = "disabled"; > + }; > + > ap_syscon: system-controller@6f4000 { > compatible = "marvell,ap806-system-controller", > "syscon"; > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > index e5e3ed678b6f..035b2b2fc9ca 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > @@ -164,6 +164,16 @@ > clocks = <&cpm_syscon0 1 21>; > status = "disabled"; > }; > + > + cpm_sdhci0: sdhci@780000 { > + compatible = "marvell,armada-7000-sdhci"; > + reg = <0x780000 0x300>; > + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "core"; > + clocks = <&cpm_syscon0 1 4>; > + status = "disabled"; > + }; > + One other point - aren't the SDHCI interfaces dma-coherent on the AP806 and CP110?
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts index 070b589680c5..6adbfcd26369 100644 --- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts +++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts @@ -146,3 +146,17 @@ &cpm_usb3_1 { status = "okay"; }; + +&ap_sdhci0 { + status = "okay"; + bus-width = <4>; + no-1-8-v; + non-removable; +}; + +&cpm_sdhci0 { + status = "okay"; + bus-width = <4>; + no-1-8-v; + non-removable; +}; diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index 7b6136182ad0..181e8c5de3bf 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -229,6 +229,15 @@ }; + ap_sdhci0: sdhci@6e0000 { + compatible = "marvell,armada-7000-sdhci"; + reg = <0x6e0000 0x300>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "core"; + clocks = <&cpm_syscon0 1 4>; + status = "disabled"; + }; + ap_syscon: system-controller@6f4000 { compatible = "marvell,ap806-system-controller", "syscon"; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index e5e3ed678b6f..035b2b2fc9ca 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -164,6 +164,16 @@ clocks = <&cpm_syscon0 1 21>; status = "disabled"; }; + + cpm_sdhci0: sdhci@780000 { + compatible = "marvell,armada-7000-sdhci"; + reg = <0x780000 0x300>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "core"; + clocks = <&cpm_syscon0 1 4>; + status = "disabled"; + }; + }; cpm_pcie0: pcie@f2600000 {
Also enable it on the Armada 7040 DB board Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> --- arch/arm64/boot/dts/marvell/armada-7040-db.dts | 14 +++++++++++++- arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 9 ++++++++- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 10 +++++++++- 3 files changed, 33 insertions(+)