diff mbox

[RFC,07/14] OvmfPkg/XenResetVector: Add new entry point for Xen PVH

Message ID 20161208153340.2285-8-anthony.perard@citrix.com (mailing list archive)
State New, archived
Headers show

Commit Message

Anthony PERARD Dec. 8, 2016, 3:33 p.m. UTC
This one enter directly in 32bits

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
---
 OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm | 79 +++++++++++++++++++++++++
 OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm      | 23 +++++++
 OvmfPkg/XenResetVector/XenResetVector.nasmb     |  1 +
 3 files changed, 103 insertions(+)
 create mode 100644 OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm
 create mode 100644 OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm

Comments

Laszlo Ersek Jan. 5, 2017, 10:36 a.m. UTC | #1
On 12/08/16 16:33, Anthony PERARD wrote:
> This one enter directly in 32bits
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
> ---
>  OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm | 79 +++++++++++++++++++++++++
>  OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm      | 23 +++++++
>  OvmfPkg/XenResetVector/XenResetVector.nasmb     |  1 +
>  3 files changed, 103 insertions(+)
>  create mode 100644 OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm
>  create mode 100644 OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm

(1) The new file "XenPVHMain.asm" is missing a license block (incl. a
Citrix copyright notice).

(2) You might want to add a similar (C) to the other new file,
"ResetVectorVtf0.asm", as well.

Thanks
Laszlo

> diff --git a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm
> new file mode 100644
> index 0000000..70436d8
> --- /dev/null
> +++ b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm
> @@ -0,0 +1,79 @@
> +;------------------------------------------------------------------------------
> +; @file
> +; First code executed by processor after resetting.
> +;
> +; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD License
> +; which accompanies this distribution.  The full text of the license may be found at
> +; http://opensource.org/licenses/bsd-license.php
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +;
> +;------------------------------------------------------------------------------
> +
> +BITS    16
> +
> +ALIGN   16
> +
> +;
> +; Pad the image size to 4k when page tables are in VTF0
> +;
> +; If the VTF0 image has page tables built in, then we need to make
> +; sure the end of VTF0 is 4k above where the page tables end.
> +;
> +; This is required so the page tables will be 4k aligned when VTF0 is
> +; located just below 0x100000000 (4GB) in the firmware device.
> +;
> +%ifdef ALIGN_TOP_TO_4K_FOR_PAGING
> +    TIMES (0x1000 - ($ - EndOfPageTables) - (fourGigabytes - xenPVHEntryPoint)) DB 0
> +%endif
> +
> +BITS    32
> +xenPVHEntryPoint:
> +; this is probably 0xffffffd0
> +  jmp xenPVHMain
> +
> +BITS    16
> +ALIGN   16
> +
> +applicationProcessorEntryPoint:
> +;
> +; Application Processors entry point
> +;
> +; GenFv generates code aligned on a 4k boundary which will jump to this
> +; location.  (0xffffffe0)  This allows the Local APIC Startup IPI to be
> +; used to wake up the application processors.
> +;
> +    jmp     EarlyApInitReal16
> +
> +ALIGN   8
> +
> +    DD      0
> +
> +;
> +; The VTF signature
> +;
> +; VTF-0 means that the VTF (Volume Top File) code does not require
> +; any fixups.
> +;
> +vtfSignature:
> +    DB      'V', 'T', 'F', 0
> +
> +ALIGN   16
> +
> +resetVector:
> +;
> +; Reset Vector
> +;
> +; This is where the processor will begin execution
> +;
> +    nop
> +    nop
> +    jmp     EarlyBspInitReal16
> +
> +ALIGN   16
> +
> +fourGigabytes:
> +
> diff --git a/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm
> new file mode 100644
> index 0000000..eb12f6c
> --- /dev/null
> +++ b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm
> @@ -0,0 +1,23 @@
> +BITS 32
> +
> +xenPVHMain:
> +  mov di, 'BP'
> +
> +  cli
> +  mov ebx, ADDR_OF(gdtr)
> +  lgdt [ebx]
> +  mov eax, SEC_DEFAULT_CR0
> +  mov cr0, eax
> +  jmp LINEAR_CODE_SEL:ADDR_OF(jmpHerePVH)
> +jmpHerePVH:
> +  mov eax, SEC_DEFAULT_CR4
> +  mov cr4, eax
> +
> +  mov     ax, LINEAR_SEL
> +  mov     ds, ax
> +  mov     es, ax
> +  mov     fs, ax
> +  mov     gs, ax
> +  mov     ss, ax
> +
> +  OneTimeCallRet TransitionFromReal16To32BitFlat
> diff --git a/OvmfPkg/XenResetVector/XenResetVector.nasmb b/OvmfPkg/XenResetVector/XenResetVector.nasmb
> index 31ac06a..f9812fd 100644
> --- a/OvmfPkg/XenResetVector/XenResetVector.nasmb
> +++ b/OvmfPkg/XenResetVector/XenResetVector.nasmb
> @@ -61,6 +61,7 @@
>  %include "Ia16/Init16.asm"
>  
>  %include "Main.asm"
> +%include "Ia32/XenPVHMain.asm"
>  
>  %include "Ia16/ResetVectorVtf0.asm"
>  
>
diff mbox

Patch

diff --git a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm
new file mode 100644
index 0000000..70436d8
--- /dev/null
+++ b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm
@@ -0,0 +1,79 @@ 
+;------------------------------------------------------------------------------
+; @file
+; First code executed by processor after resetting.
+;
+; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+BITS    16
+
+ALIGN   16
+
+;
+; Pad the image size to 4k when page tables are in VTF0
+;
+; If the VTF0 image has page tables built in, then we need to make
+; sure the end of VTF0 is 4k above where the page tables end.
+;
+; This is required so the page tables will be 4k aligned when VTF0 is
+; located just below 0x100000000 (4GB) in the firmware device.
+;
+%ifdef ALIGN_TOP_TO_4K_FOR_PAGING
+    TIMES (0x1000 - ($ - EndOfPageTables) - (fourGigabytes - xenPVHEntryPoint)) DB 0
+%endif
+
+BITS    32
+xenPVHEntryPoint:
+; this is probably 0xffffffd0
+  jmp xenPVHMain
+
+BITS    16
+ALIGN   16
+
+applicationProcessorEntryPoint:
+;
+; Application Processors entry point
+;
+; GenFv generates code aligned on a 4k boundary which will jump to this
+; location.  (0xffffffe0)  This allows the Local APIC Startup IPI to be
+; used to wake up the application processors.
+;
+    jmp     EarlyApInitReal16
+
+ALIGN   8
+
+    DD      0
+
+;
+; The VTF signature
+;
+; VTF-0 means that the VTF (Volume Top File) code does not require
+; any fixups.
+;
+vtfSignature:
+    DB      'V', 'T', 'F', 0
+
+ALIGN   16
+
+resetVector:
+;
+; Reset Vector
+;
+; This is where the processor will begin execution
+;
+    nop
+    nop
+    jmp     EarlyBspInitReal16
+
+ALIGN   16
+
+fourGigabytes:
+
diff --git a/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm
new file mode 100644
index 0000000..eb12f6c
--- /dev/null
+++ b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm
@@ -0,0 +1,23 @@ 
+BITS 32
+
+xenPVHMain:
+  mov di, 'BP'
+
+  cli
+  mov ebx, ADDR_OF(gdtr)
+  lgdt [ebx]
+  mov eax, SEC_DEFAULT_CR0
+  mov cr0, eax
+  jmp LINEAR_CODE_SEL:ADDR_OF(jmpHerePVH)
+jmpHerePVH:
+  mov eax, SEC_DEFAULT_CR4
+  mov cr4, eax
+
+  mov     ax, LINEAR_SEL
+  mov     ds, ax
+  mov     es, ax
+  mov     fs, ax
+  mov     gs, ax
+  mov     ss, ax
+
+  OneTimeCallRet TransitionFromReal16To32BitFlat
diff --git a/OvmfPkg/XenResetVector/XenResetVector.nasmb b/OvmfPkg/XenResetVector/XenResetVector.nasmb
index 31ac06a..f9812fd 100644
--- a/OvmfPkg/XenResetVector/XenResetVector.nasmb
+++ b/OvmfPkg/XenResetVector/XenResetVector.nasmb
@@ -61,6 +61,7 @@ 
 %include "Ia16/Init16.asm"
 
 %include "Main.asm"
+%include "Ia32/XenPVHMain.asm"
 
 %include "Ia16/ResetVectorVtf0.asm"