diff mbox

ACPI/PCI: Fix bus range comparation in pci_mcfg_lookup

Message ID 1483513206-113046-1-git-send-email-wangzhou1@hisilicon.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

Zhou Wang Jan. 4, 2017, 7 a.m. UTC
The configuration data provided by an MCFG region (ie PCI segment and
bus range) may span multiple host bridges.

Current code in pci_mcfg_lookup() carries out an exact match of host
bridge bus range start value against the MCFG region(s) bus range start
value which would cause configurations like the following:

MCFG region:
	bus range: 0x00~0xff.
	segment: 0.

PCI host bridges configuration (segment numbers and bus ranges):
	host bridge 1:
		bus range: 0x00~0x1f.
		segment: 0.
	host bridge 2:
		bus range: 0x20~0x4f.
		segment: 0.

to fail, in that the bus range start value for host bridge 2 does
not match the bus range start value of the respective MCFG region.

Relax the bus range check in pci_mcfg_lookup() to cater for
PCI configurations with multiple host bridges sharing the same
MCFG region.

Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
---
 drivers/acpi/pci_mcfg.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

Comments

Zhou Wang Jan. 9, 2017, 3:39 a.m. UTC | #1
On 2017/1/4 15:00, Zhou Wang wrote:
> The configuration data provided by an MCFG region (ie PCI segment and
> bus range) may span multiple host bridges.
> 
> Current code in pci_mcfg_lookup() carries out an exact match of host
> bridge bus range start value against the MCFG region(s) bus range start
> value which would cause configurations like the following:
> 
> MCFG region:
> 	bus range: 0x00~0xff.
> 	segment: 0.
> 
> PCI host bridges configuration (segment numbers and bus ranges):
> 	host bridge 1:
> 		bus range: 0x00~0x1f.
> 		segment: 0.
> 	host bridge 2:
> 		bus range: 0x20~0x4f.
> 		segment: 0.
> 
> to fail, in that the bus range start value for host bridge 2 does
> not match the bus range start value of the respective MCFG region.
> 
> Relax the bus range check in pci_mcfg_lookup() to cater for
> PCI configurations with multiple host bridges sharing the same
> MCFG region.
> 
> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> ---
>  drivers/acpi/pci_mcfg.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> index a6a4cea..2944353 100644
> --- a/drivers/acpi/pci_mcfg.c
> +++ b/drivers/acpi/pci_mcfg.c
> @@ -195,11 +195,10 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
>  		goto skip_lookup;
>  
>  	/*
> -	 * We expect exact match, unless MCFG entry end bus covers more than
> -	 * specified by caller.
> +	 * We expect the range in bus_res in the coverage of MCFG bus range.
>  	 */
>  	list_for_each_entry(e, &pci_mcfg_list, list) {
> -		if (e->segment == seg && e->bus_start == bus_res->start &&
> +		if (e->segment == seg && e->bus_start <= bus_res->start &&
>  		    e->bus_end >= bus_res->end) {
>  			root->mcfg_addr = e->addr;
>  		}
> 

Hi Rafael,

Could you please look into this patch if you have time?

Thanks,
Zhou






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Rafael J. Wysocki Jan. 9, 2017, 9:45 p.m. UTC | #2
On Mon, Jan 9, 2017 at 4:39 AM, Zhou Wang <wangzhou1@hisilicon.com> wrote:
> On 2017/1/4 15:00, Zhou Wang wrote:
>> The configuration data provided by an MCFG region (ie PCI segment and
>> bus range) may span multiple host bridges.
>>
>> Current code in pci_mcfg_lookup() carries out an exact match of host
>> bridge bus range start value against the MCFG region(s) bus range start
>> value which would cause configurations like the following:
>>
>> MCFG region:
>>       bus range: 0x00~0xff.
>>       segment: 0.
>>
>> PCI host bridges configuration (segment numbers and bus ranges):
>>       host bridge 1:
>>               bus range: 0x00~0x1f.
>>               segment: 0.
>>       host bridge 2:
>>               bus range: 0x20~0x4f.
>>               segment: 0.
>>
>> to fail, in that the bus range start value for host bridge 2 does
>> not match the bus range start value of the respective MCFG region.
>>
>> Relax the bus range check in pci_mcfg_lookup() to cater for
>> PCI configurations with multiple host bridges sharing the same
>> MCFG region.
>>
>> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
>> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
>> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>> ---
>>  drivers/acpi/pci_mcfg.c | 5 ++---
>>  1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
>> index a6a4cea..2944353 100644
>> --- a/drivers/acpi/pci_mcfg.c
>> +++ b/drivers/acpi/pci_mcfg.c
>> @@ -195,11 +195,10 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
>>               goto skip_lookup;
>>
>>       /*
>> -      * We expect exact match, unless MCFG entry end bus covers more than
>> -      * specified by caller.
>> +      * We expect the range in bus_res in the coverage of MCFG bus range.
>>        */
>>       list_for_each_entry(e, &pci_mcfg_list, list) {
>> -             if (e->segment == seg && e->bus_start == bus_res->start &&
>> +             if (e->segment == seg && e->bus_start <= bus_res->start &&
>>                   e->bus_end >= bus_res->end) {
>>                       root->mcfg_addr = e->addr;
>>               }
>>
>
> Hi Rafael,
>
> Could you please look into this patch if you have time?

Well, it makes sense to me, but this is PCI, so Bjorn has to decide here.

Thanks,
Rafael
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Zhou Wang Jan. 11, 2017, 12:36 a.m. UTC | #3
On 2017/1/10 5:45, Rafael J. Wysocki wrote:
> On Mon, Jan 9, 2017 at 4:39 AM, Zhou Wang <wangzhou1@hisilicon.com> wrote:
>> On 2017/1/4 15:00, Zhou Wang wrote:
>>> The configuration data provided by an MCFG region (ie PCI segment and
>>> bus range) may span multiple host bridges.
>>>
>>> Current code in pci_mcfg_lookup() carries out an exact match of host
>>> bridge bus range start value against the MCFG region(s) bus range start
>>> value which would cause configurations like the following:
>>>
>>> MCFG region:
>>>       bus range: 0x00~0xff.
>>>       segment: 0.
>>>
>>> PCI host bridges configuration (segment numbers and bus ranges):
>>>       host bridge 1:
>>>               bus range: 0x00~0x1f.
>>>               segment: 0.
>>>       host bridge 2:
>>>               bus range: 0x20~0x4f.
>>>               segment: 0.
>>>
>>> to fail, in that the bus range start value for host bridge 2 does
>>> not match the bus range start value of the respective MCFG region.
>>>
>>> Relax the bus range check in pci_mcfg_lookup() to cater for
>>> PCI configurations with multiple host bridges sharing the same
>>> MCFG region.
>>>
>>> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
>>> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
>>> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>>> ---
>>>  drivers/acpi/pci_mcfg.c | 5 ++---
>>>  1 file changed, 2 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
>>> index a6a4cea..2944353 100644
>>> --- a/drivers/acpi/pci_mcfg.c
>>> +++ b/drivers/acpi/pci_mcfg.c
>>> @@ -195,11 +195,10 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
>>>               goto skip_lookup;
>>>
>>>       /*
>>> -      * We expect exact match, unless MCFG entry end bus covers more than
>>> -      * specified by caller.
>>> +      * We expect the range in bus_res in the coverage of MCFG bus range.
>>>        */
>>>       list_for_each_entry(e, &pci_mcfg_list, list) {
>>> -             if (e->segment == seg && e->bus_start == bus_res->start &&
>>> +             if (e->segment == seg && e->bus_start <= bus_res->start &&
>>>                   e->bus_end >= bus_res->end) {
>>>                       root->mcfg_addr = e->addr;
>>>               }
>>>
>>
>> Hi Rafael,
>>
>> Could you please look into this patch if you have time?
> 
> Well, it makes sense to me, but this is PCI, so Bjorn has to decide here.
> 
> Thanks,
> Rafael

Many thanks for looking into this patch!

Hi Bjorn,

Please look at this patch if you have time :)

Thanks,
Zhou

> 
> .
> 

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Bjorn Helgaas Jan. 11, 2017, 9:37 p.m. UTC | #4
On Wed, Jan 04, 2017 at 03:00:06PM +0800, Zhou Wang wrote:
> The configuration data provided by an MCFG region (ie PCI segment and
> bus range) may span multiple host bridges.
> 
> Current code in pci_mcfg_lookup() carries out an exact match of host
> bridge bus range start value against the MCFG region(s) bus range start
> value which would cause configurations like the following:
> 
> MCFG region:
> 	bus range: 0x00~0xff.
> 	segment: 0.
> 
> PCI host bridges configuration (segment numbers and bus ranges):
> 	host bridge 1:
> 		bus range: 0x00~0x1f.
> 		segment: 0.
> 	host bridge 2:
> 		bus range: 0x20~0x4f.
> 		segment: 0.
> 
> to fail, in that the bus range start value for host bridge 2 does
> not match the bus range start value of the respective MCFG region.
> 
> Relax the bus range check in pci_mcfg_lookup() to cater for
> PCI configurations with multiple host bridges sharing the same
> MCFG region.
> 
> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Applied to pci/enumeration for v4.11 with the following changelog:

    PCI/ACPI: Fix bus range comparison in pci_mcfg_lookup()
    
    The configuration data provided by an MCFG entry, i.e., PCI segment and bus
    range, may span multiple host bridges.
    
    pci_mcfg_lookup() previously required an exact match of the host bridge
    starting bus and the MCFG starting bus, which made the following
    configuration fail:
    
      MCFG region:
        segment: 0
        bus range: 0x00-0xff
    
      host bridge
        segment: 0
        bus range: 0x20-0x4f
    
    Relax the bus range check in pci_mcfg_lookup() so we can use any MCFG entry
    that contains the required bus range, as we do in pci_mmconfig_lookup().
    
    [bhelgaas: changelog]
    Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
    Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
    Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

> ---
>  drivers/acpi/pci_mcfg.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
> index a6a4cea..2944353 100644
> --- a/drivers/acpi/pci_mcfg.c
> +++ b/drivers/acpi/pci_mcfg.c
> @@ -195,11 +195,10 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
>  		goto skip_lookup;
>  
>  	/*
> -	 * We expect exact match, unless MCFG entry end bus covers more than
> -	 * specified by caller.
> +	 * We expect the range in bus_res in the coverage of MCFG bus range.
>  	 */
>  	list_for_each_entry(e, &pci_mcfg_list, list) {
> -		if (e->segment == seg && e->bus_start == bus_res->start &&
> +		if (e->segment == seg && e->bus_start <= bus_res->start &&
>  		    e->bus_end >= bus_res->end) {
>  			root->mcfg_addr = e->addr;
>  		}
> -- 
> 1.9.1
> 
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Zhou Wang Jan. 12, 2017, 12:21 a.m. UTC | #5
On 2017/1/12 5:37, Bjorn Helgaas wrote:
> On Wed, Jan 04, 2017 at 03:00:06PM +0800, Zhou Wang wrote:
>> The configuration data provided by an MCFG region (ie PCI segment and
>> bus range) may span multiple host bridges.
>>
>> Current code in pci_mcfg_lookup() carries out an exact match of host
>> bridge bus range start value against the MCFG region(s) bus range start
>> value which would cause configurations like the following:
>>
>> MCFG region:
>> 	bus range: 0x00~0xff.
>> 	segment: 0.
>>
>> PCI host bridges configuration (segment numbers and bus ranges):
>> 	host bridge 1:
>> 		bus range: 0x00~0x1f.
>> 		segment: 0.
>> 	host bridge 2:
>> 		bus range: 0x20~0x4f.
>> 		segment: 0.
>>
>> to fail, in that the bus range start value for host bridge 2 does
>> not match the bus range start value of the respective MCFG region.
>>
>> Relax the bus range check in pci_mcfg_lookup() to cater for
>> PCI configurations with multiple host bridges sharing the same
>> MCFG region.
>>
>> Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
>> Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
>> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> 
> Applied to pci/enumeration for v4.11 with the following changelog:
> 
>     PCI/ACPI: Fix bus range comparison in pci_mcfg_lookup()
>     
>     The configuration data provided by an MCFG entry, i.e., PCI segment and bus
>     range, may span multiple host bridges.
>     
>     pci_mcfg_lookup() previously required an exact match of the host bridge
>     starting bus and the MCFG starting bus, which made the following
>     configuration fail:
>     
>       MCFG region:
>         segment: 0
>         bus range: 0x00-0xff
>     
>       host bridge
>         segment: 0
>         bus range: 0x20-0x4f
>     
>     Relax the bus range check in pci_mcfg_lookup() so we can use any MCFG entry
>     that contains the required bus range, as we do in pci_mmconfig_lookup().
>     
>     [bhelgaas: changelog]
>     Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
>     Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
>     Reviewed-by: Tomasz Nowicki <tn@semihalf.com>
>     Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>

Hi Bjorn,

Many thanks for modifying the commit message and merging this patch!

Best regards,
Zhou

>> ---
>>  drivers/acpi/pci_mcfg.c | 5 ++---
>>  1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
>> index a6a4cea..2944353 100644
>> --- a/drivers/acpi/pci_mcfg.c
>> +++ b/drivers/acpi/pci_mcfg.c
>> @@ -195,11 +195,10 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
>>  		goto skip_lookup;
>>  
>>  	/*
>> -	 * We expect exact match, unless MCFG entry end bus covers more than
>> -	 * specified by caller.
>> +	 * We expect the range in bus_res in the coverage of MCFG bus range.
>>  	 */
>>  	list_for_each_entry(e, &pci_mcfg_list, list) {
>> -		if (e->segment == seg && e->bus_start == bus_res->start &&
>> +		if (e->segment == seg && e->bus_start <= bus_res->start &&
>>  		    e->bus_end >= bus_res->end) {
>>  			root->mcfg_addr = e->addr;
>>  		}
>> -- 
>> 1.9.1
>>
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> 
> .
> 

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diff mbox

Patch

diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index a6a4cea..2944353 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -195,11 +195,10 @@  int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
 		goto skip_lookup;
 
 	/*
-	 * We expect exact match, unless MCFG entry end bus covers more than
-	 * specified by caller.
+	 * We expect the range in bus_res in the coverage of MCFG bus range.
 	 */
 	list_for_each_entry(e, &pci_mcfg_list, list) {
-		if (e->segment == seg && e->bus_start == bus_res->start &&
+		if (e->segment == seg && e->bus_start <= bus_res->start &&
 		    e->bus_end >= bus_res->end) {
 			root->mcfg_addr = e->addr;
 		}