| Message ID | 53c56d23af099d8a41460d5ac59a2c792c8d050c.1485250845.git-series.maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On 01/24, Maxime Ripard wrote: > The divider_get_val function that is used in our determine_rate callback > doesn't try to change the parent rate at all, while clk_divider_bestdiv, > used in divider_round_rate, does. > > If we have a single parent, call divider_round_rate. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > --- Acked-by: Stephen Boyd <sboyd@codeaurora.org>
On Fri, Jan 27, 2017 at 8:12 AM, Stephen Boyd <sboyd@codeaurora.org> wrote: > On 01/24, Maxime Ripard wrote: >> The divider_get_val function that is used in our determine_rate callback >> doesn't try to change the parent rate at all, while clk_divider_bestdiv, >> used in divider_round_rate, does. >> >> If we have a single parent, call divider_round_rate. I guess my "clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT" patch somewhat takes care of the multi-parent case? Still, the underlying clock type doesn't get to specify what is considers to be the best parent rate. >> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> >> --- > > Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Chen-Yu Tsai <wens@csie.org> -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Jan 27, 2017 at 11:30:05AM +0800, Chen-Yu Tsai wrote: > On Fri, Jan 27, 2017 at 8:12 AM, Stephen Boyd <sboyd@codeaurora.org> wrote: > > On 01/24, Maxime Ripard wrote: > >> The divider_get_val function that is used in our determine_rate callback > >> doesn't try to change the parent rate at all, while clk_divider_bestdiv, > >> used in divider_round_rate, does. > >> > >> If we have a single parent, call divider_round_rate. > > I guess my "clk: sunxi-ng: mux: Get closest parent rate possible with > CLK_SET_RATE_PARENT" patch somewhat takes care of the multi-parent > case? It looks like it does yes :) > Still, the underlying clock type doesn't get to specify what > is considers to be the best parent rate. > > >> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > >> --- > > > > Acked-by: Stephen Boyd <sboyd@codeaurora.org> > > Acked-by: Chen-Yu Tsai <wens@csie.org> Merged the two patches with Stephen and your Acked-bY. Thanks! Maxime
diff --git a/drivers/clk/sunxi-ng/ccu_div.c b/drivers/clk/sunxi-ng/ccu_div.c index 8659b4cb6c20..4057e6021aa9 100644 --- a/drivers/clk/sunxi-ng/ccu_div.c +++ b/drivers/clk/sunxi-ng/ccu_div.c @@ -77,6 +77,18 @@ static int ccu_div_determine_rate(struct clk_hw *hw, { struct ccu_div *cd = hw_to_ccu_div(hw); + if (clk_hw_get_num_parents(hw) == 1) { + req->rate = divider_round_rate(hw, req->rate, + &req->best_parent_rate, + cd->div.table, + cd->div.width, + cd->div.flags); + + req->best_parent_hw = clk_hw_get_parent(hw); + + return 0; + } + return ccu_mux_helper_determine_rate(&cd->common, &cd->mux, req, ccu_div_round_rate, cd); }
The divider_get_val function that is used in our determine_rate callback doesn't try to change the parent rate at all, while clk_divider_bestdiv, used in divider_round_rate, does. If we have a single parent, call divider_round_rate. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- drivers/clk/sunxi-ng/ccu_div.c | 12 ++++++++++++ 1 file changed, 12 insertions(+), 0 deletions(-) base-commit: 9181f40cede22bff9bc7f26830a4562373f30d73