diff mbox

[PATCHv1,2/2] mmc: sdhci-msm: Remove unnecessary comments of CDC init sequence

Message ID 1485247827-12898-3-git-send-email-riteshh@codeaurora.org (mailing list archive)
State Not Applicable, archived
Delegated to: Andy Gross
Headers show

Commit Message

Ritesh Harjani Jan. 24, 2017, 8:50 a.m. UTC
This removes CDC init sequence comments which are
not useful anyway.

Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
---
 drivers/mmc/host/sdhci-msm.c | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

Comments

Adrian Hunter Jan. 30, 2017, 9:04 a.m. UTC | #1
On 24/01/17 10:50, Ritesh Harjani wrote:
> This removes CDC init sequence comments which are
> not useful anyway.
> 
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-msm.c | 14 +-------------
>  1 file changed, 1 insertion(+), 13 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index b3e8f44..10cdc84 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -664,19 +664,7 @@ static int sdhci_msm_cdclp533_calibration(struct sdhci_host *host)
>  	config &= ~CORE_START_CDC_TRAFFIC;
>  	writel_relaxed(config, host->ioaddr + CORE_DDR_200_CFG);
>  
> -	/*
> -	 * Perform CDC Register Initialization Sequence
> -	 *
> -	 * CORE_CSR_CDC_CTLR_CFG0	0x11800EC
> -	 * CORE_CSR_CDC_CTLR_CFG1	0x3011111
> -	 * CORE_CSR_CDC_CAL_TIMER_CFG0	0x1201000
> -	 * CORE_CSR_CDC_CAL_TIMER_CFG1	0x4
> -	 * CORE_CSR_CDC_REFCOUNT_CFG	0xCB732020
> -	 * CORE_CSR_CDC_COARSE_CAL_CFG	0xB19
> -	 * CORE_CSR_CDC_DELAY_CFG	0x3AC
> -	 * CORE_CDC_OFFSET_CFG		0x0
> -	 * CORE_CDC_SLAVE_DDA_CFG	0x16334
> -	 */
> +	/* Perform CDC Register Initialization Sequence */
>  
>  	writel_relaxed(0x11800EC, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);
>  	writel_relaxed(0x3011111, host->ioaddr + CORE_CSR_CDC_CTLR_CFG1);
> 

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Ulf Hansson Jan. 30, 2017, 10:04 a.m. UTC | #2
On 24 January 2017 at 09:50, Ritesh Harjani <riteshh@codeaurora.org> wrote:
> This removes CDC init sequence comments which are
> not useful anyway.
>
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>

Thanks, applied for next!

Kind regards
Uffe


> ---
>  drivers/mmc/host/sdhci-msm.c | 14 +-------------
>  1 file changed, 1 insertion(+), 13 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index b3e8f44..10cdc84 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -664,19 +664,7 @@ static int sdhci_msm_cdclp533_calibration(struct sdhci_host *host)
>         config &= ~CORE_START_CDC_TRAFFIC;
>         writel_relaxed(config, host->ioaddr + CORE_DDR_200_CFG);
>
> -       /*
> -        * Perform CDC Register Initialization Sequence
> -        *
> -        * CORE_CSR_CDC_CTLR_CFG0       0x11800EC
> -        * CORE_CSR_CDC_CTLR_CFG1       0x3011111
> -        * CORE_CSR_CDC_CAL_TIMER_CFG0  0x1201000
> -        * CORE_CSR_CDC_CAL_TIMER_CFG1  0x4
> -        * CORE_CSR_CDC_REFCOUNT_CFG    0xCB732020
> -        * CORE_CSR_CDC_COARSE_CAL_CFG  0xB19
> -        * CORE_CSR_CDC_DELAY_CFG       0x3AC
> -        * CORE_CDC_OFFSET_CFG          0x0
> -        * CORE_CDC_SLAVE_DDA_CFG       0x16334
> -        */
> +       /* Perform CDC Register Initialization Sequence */
>
>         writel_relaxed(0x11800EC, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);
>         writel_relaxed(0x3011111, host->ioaddr + CORE_CSR_CDC_CTLR_CFG1);
> --
> The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project.
>
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diff mbox

Patch

diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index b3e8f44..10cdc84 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -664,19 +664,7 @@  static int sdhci_msm_cdclp533_calibration(struct sdhci_host *host)
 	config &= ~CORE_START_CDC_TRAFFIC;
 	writel_relaxed(config, host->ioaddr + CORE_DDR_200_CFG);
 
-	/*
-	 * Perform CDC Register Initialization Sequence
-	 *
-	 * CORE_CSR_CDC_CTLR_CFG0	0x11800EC
-	 * CORE_CSR_CDC_CTLR_CFG1	0x3011111
-	 * CORE_CSR_CDC_CAL_TIMER_CFG0	0x1201000
-	 * CORE_CSR_CDC_CAL_TIMER_CFG1	0x4
-	 * CORE_CSR_CDC_REFCOUNT_CFG	0xCB732020
-	 * CORE_CSR_CDC_COARSE_CAL_CFG	0xB19
-	 * CORE_CSR_CDC_DELAY_CFG	0x3AC
-	 * CORE_CDC_OFFSET_CFG		0x0
-	 * CORE_CDC_SLAVE_DDA_CFG	0x16334
-	 */
+	/* Perform CDC Register Initialization Sequence */
 
 	writel_relaxed(0x11800EC, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);
 	writel_relaxed(0x3011111, host->ioaddr + CORE_CSR_CDC_CTLR_CFG1);