diff mbox

drm/i915: A hotfix for making aliasing PPGTT work

Message ID 1486559013-25251-2-git-send-email-zhi.a.wang@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Wang, Zhi A Feb. 8, 2017, 1:03 p.m. UTC
This patch makes PPGTT page table non-shrinkable when using aliasing PPGTT
mode. It's just a temporary solution for making aliasing PPGTT mode work.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhiyuan Lv <zhiyuan.lv@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

Chris Wilson Feb. 9, 2017, 7:57 a.m. UTC | #1
On Wed, Feb 08, 2017 at 09:03:33PM +0800, Zhi Wang wrote:
> This patch makes PPGTT page table non-shrinkable when using aliasing PPGTT
> mode. It's just a temporary solution for making aliasing PPGTT mode work.
> 
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Zhiyuan Lv <zhiyuan.lv@intel.com>
> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 22b3374..3af3b1c 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -754,10 +754,12 @@ static bool gen8_ppgtt_clear_pt(struct i915_address_space *vm,
>  
>  	GEM_BUG_ON(pte_end > GEN8_PTES);
>  
> -	bitmap_clear(pt->used_ptes, pte, num_entries);
> +	if (USES_FULL_PPGTT(vm->i915)) {
> +		bitmap_clear(pt->used_ptes, pte, num_entries);
>  
> -	if (bitmap_empty(pt->used_ptes, GEN8_PTES))
> -		return true;
> +		if (bitmap_empty(pt->used_ptes, GEN8_PTES))
> +			return true;

I would have personally used return USES_FULL_PPGTT(vm->i915) because
that's a smaller patch and doesn't disrupt the flow as much.

Respin and have a r-b if you can suggest an igt...
-Chris
Chris Wilson Feb. 9, 2017, 8:10 a.m. UTC | #2
On Wed, Feb 08, 2017 at 09:03:33PM +0800, Zhi Wang wrote:
> This patch makes PPGTT page table non-shrinkable when using aliasing PPGTT
> mode. It's just a temporary solution for making aliasing PPGTT mode work.
> 
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Zhiyuan Lv <zhiyuan.lv@intel.com>
> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>

This also needs a Fixes line so that we now which kernels need the
patch.
-Chris
Chris Wilson Feb. 9, 2017, 8:27 a.m. UTC | #3
On Thu, Feb 09, 2017 at 07:57:33AM +0000, Chris Wilson wrote:
> On Wed, Feb 08, 2017 at 09:03:33PM +0800, Zhi Wang wrote:
> > This patch makes PPGTT page table non-shrinkable when using aliasing PPGTT
> > mode. It's just a temporary solution for making aliasing PPGTT mode work.
> > 
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> > Cc: Michal Winiarski <michal.winiarski@intel.com>
> > Cc: Michel Thierry <michel.thierry@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Daniel Vetter <daniel.vetter@intel.com>
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Cc: Zhiyuan Lv <zhiyuan.lv@intel.com>
> > Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +++++---
> >  1 file changed, 5 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 22b3374..3af3b1c 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -754,10 +754,12 @@ static bool gen8_ppgtt_clear_pt(struct i915_address_space *vm,
> >  
> >  	GEM_BUG_ON(pte_end > GEN8_PTES);
> >  
> > -	bitmap_clear(pt->used_ptes, pte, num_entries);
> > +	if (USES_FULL_PPGTT(vm->i915)) {
> > +		bitmap_clear(pt->used_ptes, pte, num_entries);
> >  
> > -	if (bitmap_empty(pt->used_ptes, GEN8_PTES))
> > -		return true;
> > +		if (bitmap_empty(pt->used_ptes, GEN8_PTES))
> > +			return true;
> 
> I would have personally used return USES_FULL_PPGTT(vm->i915) because
> that's a smaller patch and doesn't disrupt the flow as much.

Disregard. Not thinking, I'll be back after coffee.
-Chris
Wang, Zhi A Feb. 9, 2017, 8:46 a.m. UTC | #4
Thanks for the help!!! ^_^

On 02/09/17 16:10, Chris Wilson wrote:
> On Wed, Feb 08, 2017 at 09:03:33PM +0800, Zhi Wang wrote:
>> This patch makes PPGTT page table non-shrinkable when using aliasing PPGTT
>> mode. It's just a temporary solution for making aliasing PPGTT mode work.
>>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
>> Cc: Michal Winiarski <michal.winiarski@intel.com>
>> Cc: Michel Thierry <michel.thierry@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Daniel Vetter <daniel.vetter@intel.com>
>> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
>> Cc: Zhiyuan Lv <zhiyuan.lv@intel.com>
>> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
>
> This also needs a Fixes line so that we now which kernels need the
> patch.
> -Chris
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 22b3374..3af3b1c 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -754,10 +754,12 @@  static bool gen8_ppgtt_clear_pt(struct i915_address_space *vm,
 
 	GEM_BUG_ON(pte_end > GEN8_PTES);
 
-	bitmap_clear(pt->used_ptes, pte, num_entries);
+	if (USES_FULL_PPGTT(vm->i915)) {
+		bitmap_clear(pt->used_ptes, pte, num_entries);
 
-	if (bitmap_empty(pt->used_ptes, GEN8_PTES))
-		return true;
+		if (bitmap_empty(pt->used_ptes, GEN8_PTES))
+			return true;
+	}
 
 	pt_vaddr = kmap_px(pt);