| Message ID | alpine.LNX.2.00.1702051101110.26313@T420s (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sun, Feb 5, 2017 at 11:03 AM, Hans Ulli Kroll <ulli.kroll@googlemail.com> wrote: > We need to the remove hwirq 26-28 from DT. > First one will print this warning while boot. > > irq: type mismatch, failed to map hwirq-26 for /soc/interrupt-controller@48000000! (...) > - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, /* PCI A */ > - <26 IRQ_TYPE_LEVEL_HIGH>, /* PCI B */ > - <27 IRQ_TYPE_LEVEL_HIGH>, /* PCI C */ > - <28 IRQ_TYPE_LEVEL_HIGH>; /* PCI D */ > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* chained irq PCI A-D */ Sure I can remove them ... just found them in the irqs.h file and thought it made sense to add them. I'll just cut them. Since there is actually an internal IRQ controller in the host controller cascading the four PCI child IRQs that we model as an irqchip, I don't really see why they have these "PCI B-D" IRQs... anyone has a guess? Yours, Linus Walleij
Hi Linus, On Sun, 5 Feb 2017, Linus Walleij wrote: > On Sun, Feb 5, 2017 at 11:03 AM, Hans Ulli Kroll > <ulli.kroll@googlemail.com> wrote: > > > We need to the remove hwirq 26-28 from DT. > > First one will print this warning while boot. > > > > irq: type mismatch, failed to map hwirq-26 for /soc/interrupt-controller@48000000! > (...) > > - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, /* PCI A */ > > - <26 IRQ_TYPE_LEVEL_HIGH>, /* PCI B */ > > - <27 IRQ_TYPE_LEVEL_HIGH>, /* PCI C */ > > - <28 IRQ_TYPE_LEVEL_HIGH>; /* PCI D */ > > + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* chained irq PCI A-D */ > > Sure I can remove them ... just found them in the irqs.h file and thought it > made sense to add them. I'll just cut them. > > Since there is actually an internal IRQ controller in the host controller > cascading the four PCI child IRQs that we model as an irqchip, I don't > really see why they have these "PCI B-D" IRQs... anyone has a guess? I think they used some other IP vendor. from my IB 4220 sources. #define IRQ_PCI_INTA PCI_IRQ_OFFSET + 0 #ifndef CONFIG_DUAL_PCI #define IRQ_PCI_INTB PCI_IRQ_OFFSET + 1 #define IRQ_PCI_INTC PCI_IRQ_OFFSET + 2 #define IRQ_PCI_INTD PCI_IRQ_OFFSET + 3 #else #define IRQ_PCI_INTB 27 #define IRQ_PCI_INTC 28 #define IRQ_PCI_INTD 29 #endif CONFIG_DUAL_PCI is never used IRQ_PCIB - IRQ_PCID or IRQ_PCI_INTB - IRQ_PCI_INTD are also never used. You can download my original NAS 4220 here http://ulli-kroll.de/gemini/kernel.tgz Greetings Hans Ulli Kroll
On Monday, February 6, 2017 10:55:03 AM CET Hans Ulli Kroll wrote: > > from my IB 4220 sources. > > #define IRQ_PCI_INTA PCI_IRQ_OFFSET + 0 > #ifndef CONFIG_DUAL_PCI > #define IRQ_PCI_INTB PCI_IRQ_OFFSET + 1 > #define IRQ_PCI_INTC PCI_IRQ_OFFSET + 2 > #define IRQ_PCI_INTD PCI_IRQ_OFFSET + 3 > #else > #define IRQ_PCI_INTB 27 > #define IRQ_PCI_INTC 28 > #define IRQ_PCI_INTD 29 > #endif > > CONFIG_DUAL_PCI is never used > IRQ_PCIB - IRQ_PCID or IRQ_PCI_INTB - IRQ_PCI_INTD are also never used. > > The source code that Linus quoted earlier had references to 'IRQ_PCI_INTA +n' though, which is basically the same thing. Arnd
On Fri, Feb 10, 2017 at 4:40 PM, Arnd Bergmann <arnd@arndb.de> wrote: > On Monday, February 6, 2017 10:55:03 AM CET Hans Ulli Kroll wrote: >> >> from my IB 4220 sources. >> >> #define IRQ_PCI_INTA PCI_IRQ_OFFSET + 0 >> #ifndef CONFIG_DUAL_PCI >> #define IRQ_PCI_INTB PCI_IRQ_OFFSET + 1 >> #define IRQ_PCI_INTC PCI_IRQ_OFFSET + 2 >> #define IRQ_PCI_INTD PCI_IRQ_OFFSET + 3 >> #else >> #define IRQ_PCI_INTB 27 >> #define IRQ_PCI_INTC 28 >> #define IRQ_PCI_INTD 29 >> #endif >> >> CONFIG_DUAL_PCI is never used >> IRQ_PCIB - IRQ_PCID or IRQ_PCI_INTB - IRQ_PCI_INTD are also never used. > > The source code that Linus quoted earlier had references to > 'IRQ_PCI_INTA +n' though, which is basically the same thing. There is essentially two versions of the IP block, one which has a cascaded interrupt controller in the PCI host bridge, and one named "dual PCI" that has dedicated IRQs for PCIA, B, C, D on the primary interrupt controller. I'll try to codify it into the driver so it's clear how this works on the two variants. I'm also pretty sure this is a faraday IP block and not something from Storlink/Storm/Cortina, so I will rename the compatible strings etc reflecting that. Yours, Linus Walleij
diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi index 11441e577058..0e2c021cd8c5 100644 --- a/arch/arm/boot/dts/gemini.dtsi +++ b/arch/arm/boot/dts/gemini.dtsi @@ -114,10 +114,7 @@ pci@50000000 { compatible = "cortina,gemini-pci"; reg = <0x50000000 0x100>; - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, /* PCI A */ - <26 IRQ_TYPE_LEVEL_HIGH>, /* PCI B */ - <27 IRQ_TYPE_LEVEL_HIGH>, /* PCI C */ - <28 IRQ_TYPE_LEVEL_HIGH>; /* PCI D */ + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* chained irq PCI A-D */ #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>;