diff mbox

ARM: dts: armada-385-synology-ds116: add support for Synology DS116 NAS

Message ID 1486805073-15534-1-git-send-email-w@1wt.eu (mailing list archive)
State New, archived
Headers show

Commit Message

Willy Tarreau Feb. 11, 2017, 9:24 a.m. UTC
This commit adds the device tree description for the Synology DS116 NAS.

It is a one-bay NAS powered by a Marvell Armada 385 at 1.866 GHz. The
device features the following items :
  - 1 GB DDR3 RAM
  - a 8MB SPI flash
  - 2 USB3 ports, power-controlled via a GPIO for each
  - 1 gigabit ethernet interface connected over SGMII to a 88e1514 phy
  - a single SATA port, power-controlled via a GPIO
  - a battery-powered RTC
  - one UART connected to the serial console (2mm connector on board)
  - the Tx line of the second UART connected to a PIC microcontroller
    dealing with beep, reset, power-off and LED blinking (115200 Bps)
  - some of the front-panel LEDs are connected to GPIOs, one is directly
    connected to the SATA link to report disk activity.
  - a GPIO-controlled fan (3 bits for 7 speeds and OFF)

With this DTS, my NAS is 100% functional starting with kernel 4.9.

Signed-off-by: Willy Tarreau <w@1wt.eu>
---
 arch/arm/boot/dts/Makefile                      |   1 +
 arch/arm/boot/dts/armada-385-synology-ds116.dts | 315 ++++++++++++++++++++++++
 2 files changed, 316 insertions(+)
 create mode 100644 arch/arm/boot/dts/armada-385-synology-ds116.dts

Comments

Andrew Lunn Feb. 12, 2017, 12:40 a.m. UTC | #1
> +			serial@12000 {
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&uart0_pins>;
> +				status = "okay";
> +			};
> +
> +			serial@12100 {
> +				/* A PIC16F1829 is connected to uart1 at 115200 bps,
> +				 * and takes single-character orders :
> +				 *   "1" : power off

Hi Willy

The qnap-poweroff.c driver will support this. You need a new
compatible string, since 115200 is not the speed the current synology
devices use.

> +				 *   "2" : short beep
> +				 *   "3" : long beep
> +				 *   "4" : turn the power LED ON
> +				 *   "5" : flash the power LED
> +				 *   "6" : turn the power LED OFF
> +				 *   "7" : turn the status LED OFF
> +				 *   "8" : turn the status LED ON
> +				 *   "9" : flash the status LED
> +				 *   "A" : flash the motherboard LED (D8)
> +				 *   "B" : turn the motherboard LED OFF
> +				 *   "C" : hard reset
> +				 */
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&uart1_pins>;
> +				status = "okay";
> +			};

> +		gpio-leds {
> +			compatible = "gpio-leds";
> +
> +			/* The greed part is on gpio0.20 which is also used by

green?


Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew
Willy Tarreau Feb. 12, 2017, 12:53 a.m. UTC | #2
Hi Andrew,

On Sun, Feb 12, 2017 at 01:40:31AM +0100, Andrew Lunn wrote:
> > +			serial@12000 {
> > +				pinctrl-names = "default";
> > +				pinctrl-0 = <&uart0_pins>;
> > +				status = "okay";
> > +			};
> > +
> > +			serial@12100 {
> > +				/* A PIC16F1829 is connected to uart1 at 115200 bps,
> > +				 * and takes single-character orders :
> > +				 *   "1" : power off
> 
> Hi Willy
> 
> The qnap-poweroff.c driver will support this. You need a new
> compatible string, since 115200 is not the speed the current synology
> devices use.

But won't that squat the I/O address and prevent me from using all the
other codes via the regular serial port ? They are particularly convenient
in fact since they are the only way to access the LEDs, beeper and even
to trigger a reset (even if this last one is less used in software form).

> > +				 *   "2" : short beep
> > +				 *   "3" : long beep
> > +				 *   "4" : turn the power LED ON
> > +				 *   "5" : flash the power LED
> > +				 *   "6" : turn the power LED OFF
> > +				 *   "7" : turn the status LED OFF
> > +				 *   "8" : turn the status LED ON
> > +				 *   "9" : flash the status LED
> > +				 *   "A" : flash the motherboard LED (D8)
> > +				 *   "B" : turn the motherboard LED OFF
> > +				 *   "C" : hard reset
> > +				 */
> > +				pinctrl-names = "default";
> > +				pinctrl-0 = <&uart1_pins>;
> > +				status = "okay";
> > +			};
> 
> > +		gpio-leds {
> > +			compatible = "gpio-leds";
> > +
> > +			/* The greed part is on gpio0.20 which is also used by
> 
> green?

Oops, sorry, thanks for catching.

Willy
Andrew Lunn Feb. 12, 2017, 1:17 a.m. UTC | #3
> But won't that squat the I/O address and prevent me from using all the
> other codes via the regular serial port ?

Nope. That driver hijacks the serial port during shutdown to actually
turn the power off. The rest of the time, it does not touch the serial
port. Userspace, or the rest of the kernel is free to use it.

	Andrew
Willy Tarreau Feb. 12, 2017, 1:24 a.m. UTC | #4
On Sun, Feb 12, 2017 at 02:17:44AM +0100, Andrew Lunn wrote:
> > But won't that squat the I/O address and prevent me from using all the
> > other codes via the regular serial port ?
> 
> Nope. That driver hijacks the serial port during shutdown to actually
> turn the power off. The rest of the time, it does not touch the serial
> port. Userspace, or the rest of the kernel is free to use it.

OK so I should declare both the serial and the power-off device at the
same address ? Excuse-me for the dumb question but I'm not much used to
doing uncommon things in DTS files :-/

Willy
Andrew Lunn Feb. 12, 2017, 3:38 p.m. UTC | #5
On Sun, Feb 12, 2017 at 02:24:18AM +0100, Willy Tarreau wrote:
> On Sun, Feb 12, 2017 at 02:17:44AM +0100, Andrew Lunn wrote:
> > > But won't that squat the I/O address and prevent me from using all the
> > > other codes via the regular serial port ?
> > 
> > Nope. That driver hijacks the serial port during shutdown to actually
> > turn the power off. The rest of the time, it does not touch the serial
> > port. Userspace, or the rest of the kernel is free to use it.
> 
> OK so I should declare both the serial and the power-off device at the
> same address ? Excuse-me for the dumb question but I'm not much used to
> doing uncommon things in DTS files :-/

Hi Willy

What you have in v2 and v3 looks good. It could be considered a bit of
a hack, two nodes for the same hardware block. But they are used at
different times, normal runtime, and late in the shutdown. So it works
out O.K.

    Andrew
Willy Tarreau Feb. 12, 2017, 3:44 p.m. UTC | #6
On Sun, Feb 12, 2017 at 04:38:55PM +0100, Andrew Lunn wrote:
> On Sun, Feb 12, 2017 at 02:24:18AM +0100, Willy Tarreau wrote:
> > On Sun, Feb 12, 2017 at 02:17:44AM +0100, Andrew Lunn wrote:
> > > > But won't that squat the I/O address and prevent me from using all the
> > > > other codes via the regular serial port ?
> > > 
> > > Nope. That driver hijacks the serial port during shutdown to actually
> > > turn the power off. The rest of the time, it does not touch the serial
> > > port. Userspace, or the rest of the kernel is free to use it.
> > 
> > OK so I should declare both the serial and the power-off device at the
> > same address ? Excuse-me for the dumb question but I'm not much used to
> > doing uncommon things in DTS files :-/
> 
> Hi Willy
> 
> What you have in v2 and v3 looks good. It could be considered a bit of
> a hack, two nodes for the same hardware block. But they are used at
> different times, normal runtime, and late in the shutdown. So it works
> out O.K.

OK thanks for confirming :-)

Willy
Thomas Petazzoni Feb. 12, 2017, 5:27 p.m. UTC | #7
Hello,

On Sun, 12 Feb 2017 16:38:55 +0100, Andrew Lunn wrote:

> What you have in v2 and v3 looks good. It could be considered a bit of
> a hack, two nodes for the same hardware block. But they are used at
> different times, normal runtime, and late in the shutdown. So it works
> out O.K.

I don't really mind personally, but IMO this is clearly a hack. It
completely violates the rule that the DT should represent the HW, and
the fact that the DT should be operating system agnostic.

But anyway, there are so many things in the DT that violates those
rules that probably this hack is fine.

Thomas
diff mbox

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 01d178a..2bc2b33 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -949,6 +949,7 @@  dtb-$(CONFIG_MACH_ARMADA_38X) += \
 	armada-385-db-ap.dtb \
 	armada-385-linksys-caiman.dtb \
 	armada-385-linksys-cobra.dtb \
+	armada-385-synology-ds116.dtb \
 	armada-385-turris-omnia.dtb \
 	armada-388-clearfog.dtb \
 	armada-388-db.dtb \
diff --git a/arch/arm/boot/dts/armada-385-synology-ds116.dts b/arch/arm/boot/dts/armada-385-synology-ds116.dts
new file mode 100644
index 0000000..457a921
--- /dev/null
+++ b/arch/arm/boot/dts/armada-385-synology-ds116.dts
@@ -0,0 +1,315 @@ 
+/*
+ * Device Tree file for Synology DS116 NAS
+ *
+ * Copyright (C) 2017 Willy Tarreau <w@1wt.eu>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is licensed under the terms of the GNU General Public
+ *     License version 2.  This program is licensed "as is" without
+ *     any warranty of any kind, whether express or implied.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "armada-385.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Synology DS116";
+	compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x40000000>; /* 1 GB */
+	};
+
+	soc {
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
+			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
+			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
+			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
+			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
+
+		internal-regs {
+			i2c@11000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&i2c0_pins>;
+				status = "okay";
+				clock-frequency = <100000>;
+
+				eeprom@57 {
+					compatible = "atmel,24c64";
+					reg = <0x57>;
+				};
+			};
+
+			serial@12000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&uart0_pins>;
+				status = "okay";
+			};
+
+			serial@12100 {
+				/* A PIC16F1829 is connected to uart1 at 115200 bps,
+				 * and takes single-character orders :
+				 *   "1" : power off
+				 *   "2" : short beep
+				 *   "3" : long beep
+				 *   "4" : turn the power LED ON
+				 *   "5" : flash the power LED
+				 *   "6" : turn the power LED OFF
+				 *   "7" : turn the status LED OFF
+				 *   "8" : turn the status LED ON
+				 *   "9" : flash the status LED
+				 *   "A" : flash the motherboard LED (D8)
+				 *   "B" : turn the motherboard LED OFF
+				 *   "C" : hard reset
+				 */
+				pinctrl-names = "default";
+				pinctrl-0 = <&uart1_pins>;
+				status = "okay";
+			};
+
+			ethernet@70000 {
+				pinctrl-names = "default";
+				phy = <&phy0>;
+				phy-mode = "sgmii";
+				buffer-manager = <&bm>;
+				bm,pool-long = <0>;
+				status = "okay";
+			};
+
+
+			mdio@72004 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&mdio_pins>;
+
+				phy0: ethernet-phy@1 {
+					reg = <1>;
+				};
+			};
+
+			sata@a8000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&sata0_pins>;
+				status = "okay";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				sata0: sata-port@0 {
+					reg = <0>;
+					target-supply = <&reg_5v_sata0>;
+				};
+			};
+
+			bm@c8000 {
+				status = "okay";
+			};
+
+			usb3@f0000 {
+				usb-phy = <&usb3_0_phy>;
+				status = "okay";
+			};
+
+			usb3@f8000 {
+				usb-phy = <&usb3_1_phy>;
+				status = "okay";
+			};
+		};
+
+		bm-bppi {
+			status = "okay";
+		};
+
+		gpio-fan {
+			compatible = "gpio-fan";
+			gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>,
+				<&gpio1 17 GPIO_ACTIVE_HIGH>,
+				<&gpio1 16 GPIO_ACTIVE_HIGH>;
+			gpio-fan,speed-map = <   0 0
+					      1500 1
+					      2500 2
+					      3000 3
+					      3400 4
+					      3700 5
+					      3900 6
+					      4000 7>;
+			cooling-cells = <2>;
+		};
+
+		gpio-leds {
+			compatible = "gpio-leds";
+
+			/* The greed part is on gpio0.20 which is also used by
+			 * sata0, and accesses to SATA disk 0 make it blink so it
+			 * doesn't need to be declared here.
+			 */
+			orange {
+				gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+				label = "ds116:orange:disk";
+				default-state = "off";
+			};
+		};
+	};
+
+	usb3_0_phy: usb3_0_phy {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&reg_usb3_0_vbus>;
+	};
+
+	usb3_1_phy: usb3_1_phy {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&reg_usb3_1_vbus>;
+	};
+
+	reg_usb3_0_vbus: usb3-vbus0 {
+		compatible = "regulator-fixed";
+		regulator-name = "usb3-vbus0";
+		pinctrl-names = "default";
+		pinctrl-0 = <&xhci0_vbus_pins>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_usb3_1_vbus: usb3-vbus1 {
+		compatible = "regulator-fixed";
+		regulator-name = "usb3-vbus1";
+		pinctrl-names = "default";
+		pinctrl-0 = <&xhci1_vbus_pins>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_sata0: pwr-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "pwr_en_sata0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		enable-active-high;
+		regulator-boot-on;
+		gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+	};
+
+	reg_5v_sata0: v5-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "v5.0-sata0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&reg_sata0>;
+	};
+
+	reg_12v_sata0: v12-sata0 {
+		compatible = "regulator-fixed";
+		regulator-name = "v12.0-sata0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		vin-supply = <&reg_sata0>;
+	};
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pins>;
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "macronix,mx25l6405d", "jedec,spi-nor";
+		reg = <0>; /* Chip select 0 */
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+
+		/* Note: there is a redboot partition table despite u-boot
+		 * being used. The names presented here are the same as those
+		 * found in the FIS directory. There is also a small device
+		 * tree in the last 64kB of the RedBoot partition which is not
+		 * enumerated. The MAC address and the serial number are listed
+		 * in the "vendor" partition.
+		 */
+		partition@00000000 {
+			label = "RedBoot";
+			reg = <0x00000000 0x000f0000>;
+			read-only;
+		};
+
+		partition@000c0000 {
+			label = "zImage";
+			reg = <0x000f0000 0x002d0000>;
+		};
+
+		partition@00390000 {
+			label = "rd.gz";
+			reg = <0x003c0000 0x00410000>;
+		};
+
+		partition@007d0000 {
+			label = "vendor";
+			reg = <0x007d0000 0x00010000>;
+			read-only;
+		};
+
+		partition@007e0000 {
+			label = "RedBoot config";
+			reg = <0x007e0000 0x00010000>;
+			read-only;
+		};
+
+		partition@007f0000 {
+			label = "FIS directory";
+			reg = <0x007f0000 0x00010000>;
+			read-only;
+		};
+	};
+};
+
+&pinctrl {
+	/* use only one pin for UART1, as mpp20 is used by sata0 */
+	uart1_pins: uart-pins-1 {
+		marvell,pins = "mpp19";
+		marvell,function = "ua1";
+	};
+
+	xhci0_vbus_pins: xhci0_vbus_pins {
+		marvell,pins = "mpp58";
+		marvell,function = "gpio";
+	};
+	xhci1_vbus_pins: xhci1_vbus_pins {
+		marvell,pins = "mpp59";
+		marvell,function = "gpio";
+	};
+};