| Message ID | 1487620842-22893-4-git-send-email-paulo.r.zanoni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Feb 20, 2017 at 05:00:42PM -0300, Paulo Zanoni wrote: > Possible problems of the current if-ladder: > - It's a huge if ladder with almost a different check for each of > our platforms. > - It mixes 3 different types of checks: IS_GENX, IS_PLATFORM and > IS_GROUP_OF_PLATFORMS. > - As demonstrated by the recent IS_G4X commit, it's not easy to be > sure if a platform down on the list isn't also checked earlier. > - As demonstrated by the WARN at the end, it's not easy to be sure > if we're actually checking for every single platform. > > Possible advantages of the new switch statement: > - It may be easier for the compiler to optimize stuff (I didn't > check this), especially since the values are labels of an enum. > - The compiler will tell us in case we miss some platform. > - All platforms are explicitly there instead of maybe hidden in some > check for a certain group of platforms such as IS_GEN9_BC. > > Possible disadvantages with the new code: > - A few lines bigger. > > v2: Don't unsort the list. Now the list almost matches the enum > definition, with the exception of CHV, KBL and GLK, which are listed > along their predecessors (Ville). > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_cdclk.c | 105 +++++++++++++++++++++++-------------- > 1 file changed, 66 insertions(+), 39 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c > index 942adf0..e1921fe7 100644 > --- a/drivers/gpu/drm/i915/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/intel_cdclk.c > @@ -1762,49 +1762,76 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv) > dev_priv->display.calc_cdclk_state = skl_calc_cdclk_state; > } > > - if (IS_GEN9_BC(dev_priv)) > - dev_priv->display.get_cdclk = skl_get_cdclk; > - else if (IS_GEN9_LP(dev_priv)) > - dev_priv->display.get_cdclk = bxt_get_cdclk; > - else if (IS_BROADWELL(dev_priv)) > - dev_priv->display.get_cdclk = bdw_get_cdclk; > - else if (IS_HASWELL(dev_priv)) > - dev_priv->display.get_cdclk = hsw_get_cdclk; > - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > - dev_priv->display.get_cdclk = vlv_get_cdclk; > - else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) > + switch (INTEL_INFO(dev_priv)->platform) { > + case INTEL_PLATFORM_UNINITIALIZED: > + MISSING_CASE(INTEL_INFO(dev_priv)->platform); > + /* Fall through. */ > + case INTEL_I830: The diff might come out nicer if you didn't reverse the list. Right now it's quite hard to read. > + dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk; > + break; > + case INTEL_I845G: > + dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk; > + break; > + case INTEL_I85X: > + dev_priv->display.get_cdclk = i85x_get_cdclk; > + break; > + case INTEL_I865G: > + dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk; > + break; > + case INTEL_I915G: > + dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk; > + break; > + case INTEL_I915GM: > + dev_priv->display.get_cdclk = i915gm_get_cdclk; > + break; > + case INTEL_I945G: > dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > - else if (IS_GEN5(dev_priv)) > - dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk; > - else if (IS_GM45(dev_priv)) > - dev_priv->display.get_cdclk = gm45_get_cdclk; > - else if (IS_G45(dev_priv)) > + break; > + case INTEL_I945GM: > + dev_priv->display.get_cdclk = i945gm_get_cdclk; > + break; > + case INTEL_G33: > dev_priv->display.get_cdclk = g33_get_cdclk; > - else if (IS_I965GM(dev_priv)) > - dev_priv->display.get_cdclk = i965gm_get_cdclk; > - else if (IS_I965G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > - else if (IS_PINEVIEW(dev_priv)) > + break; > + case INTEL_PINEVIEW: > dev_priv->display.get_cdclk = pnv_get_cdclk; > - else if (IS_G33(dev_priv)) > + break; > + case INTEL_I965G: > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > + break; > + case INTEL_I965GM: > + dev_priv->display.get_cdclk = i965gm_get_cdclk; > + break; > + case INTEL_G45: > dev_priv->display.get_cdclk = g33_get_cdclk; > - else if (IS_I945GM(dev_priv)) > - dev_priv->display.get_cdclk = i945gm_get_cdclk; > - else if (IS_I945G(dev_priv)) > + break; > + case INTEL_GM45: > + dev_priv->display.get_cdclk = gm45_get_cdclk; > + break; > + case INTEL_IRONLAKE: > + dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk; > + break; > + case INTEL_SANDYBRIDGE: > + case INTEL_IVYBRIDGE: > dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > - else if (IS_I915GM(dev_priv)) > - dev_priv->display.get_cdclk = i915gm_get_cdclk; > - else if (IS_I915G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk; > - else if (IS_I865G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk; > - else if (IS_I85X(dev_priv)) > - dev_priv->display.get_cdclk = i85x_get_cdclk; > - else if (IS_I845G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk; > - else { /* 830 */ > - WARN(!IS_I830(dev_priv), > - "Unknown platform. Assuming 133 MHz CDCLK\n"); > - dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk; > + break; > + case INTEL_VALLEYVIEW: > + case INTEL_CHERRYVIEW: > + dev_priv->display.get_cdclk = vlv_get_cdclk; > + break; > + case INTEL_HASWELL: > + dev_priv->display.get_cdclk = hsw_get_cdclk; > + break; > + case INTEL_BROADWELL: > + dev_priv->display.get_cdclk = bdw_get_cdclk; > + break; > + case INTEL_SKYLAKE: > + case INTEL_KABYLAKE: > + dev_priv->display.get_cdclk = skl_get_cdclk; > + break; > + case INTEL_BROXTON: > + case INTEL_GEMINILAKE: > + dev_priv->display.get_cdclk = bxt_get_cdclk; > + break; > } > } > -- > 2.7.4
On Mon, 2017-02-20 at 17:00 -0300, Paulo Zanoni wrote: > Possible problems of the current if-ladder: > - It's a huge if ladder with almost a different check for each of > our platforms. > - It mixes 3 different types of checks: IS_GENX, IS_PLATFORM and > IS_GROUP_OF_PLATFORMS. > - As demonstrated by the recent IS_G4X commit, it's not easy to be > sure if a platform down on the list isn't also checked earlier. > - As demonstrated by the WARN at the end, it's not easy to be sure > if we're actually checking for every single platform. > > Possible advantages of the new switch statement: > - It may be easier for the compiler to optimize stuff (I didn't > check this), especially since the values are labels of an enum. > - The compiler will tell us in case we miss some platform. > - All platforms are explicitly there instead of maybe hidden in some > check for a certain group of platforms such as IS_GEN9_BC. > > Possible disadvantages with the new code: > - A few lines bigger. I had suggested something different at some point, but didn't get around to implementing it yet: https://lists.freedesktop.org/archives/intel-gfx/2016-December/115078.html I think that if we need almost one case for each single platform, might as well put these in device info. Anyway, I didn't check how well that proposal works with the changes in this series, but figured I mention it anyway in case it helps. Ander > > v2: Don't unsort the list. Now the list almost matches the enum > definition, with the exception of CHV, KBL and GLK, which are listed > along their predecessors (Ville). > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_cdclk.c | 105 +++++++++++++++++++++++-------------- > 1 file changed, 66 insertions(+), 39 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c > index 942adf0..e1921fe7 100644 > --- a/drivers/gpu/drm/i915/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/intel_cdclk.c > @@ -1762,49 +1762,76 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv) > dev_priv->display.calc_cdclk_state = skl_calc_cdclk_state; > } > > - if (IS_GEN9_BC(dev_priv)) > - dev_priv->display.get_cdclk = skl_get_cdclk; > - else if (IS_GEN9_LP(dev_priv)) > - dev_priv->display.get_cdclk = bxt_get_cdclk; > - else if (IS_BROADWELL(dev_priv)) > - dev_priv->display.get_cdclk = bdw_get_cdclk; > - else if (IS_HASWELL(dev_priv)) > - dev_priv->display.get_cdclk = hsw_get_cdclk; > - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > - dev_priv->display.get_cdclk = vlv_get_cdclk; > - else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) > + switch (INTEL_INFO(dev_priv)->platform) { > + case INTEL_PLATFORM_UNINITIALIZED: > + MISSING_CASE(INTEL_INFO(dev_priv)->platform); > + /* Fall through. */ > + case INTEL_I830: > + dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk; > + break; > + case INTEL_I845G: > + dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk; > + break; > + case INTEL_I85X: > + dev_priv->display.get_cdclk = i85x_get_cdclk; > + break; > + case INTEL_I865G: > + dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk; > + break; > + case INTEL_I915G: > + dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk; > + break; > + case INTEL_I915GM: > + dev_priv->display.get_cdclk = i915gm_get_cdclk; > + break; > + case INTEL_I945G: > dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > - else if (IS_GEN5(dev_priv)) > - dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk; > - else if (IS_GM45(dev_priv)) > - dev_priv->display.get_cdclk = gm45_get_cdclk; > - else if (IS_G45(dev_priv)) > + break; > + case INTEL_I945GM: > + dev_priv->display.get_cdclk = i945gm_get_cdclk; > + break; > + case INTEL_G33: > dev_priv->display.get_cdclk = g33_get_cdclk; > - else if (IS_I965GM(dev_priv)) > - dev_priv->display.get_cdclk = i965gm_get_cdclk; > - else if (IS_I965G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > - else if (IS_PINEVIEW(dev_priv)) > + break; > + case INTEL_PINEVIEW: > dev_priv->display.get_cdclk = pnv_get_cdclk; > - else if (IS_G33(dev_priv)) > + break; > + case INTEL_I965G: > + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > + break; > + case INTEL_I965GM: > + dev_priv->display.get_cdclk = i965gm_get_cdclk; > + break; > + case INTEL_G45: > dev_priv->display.get_cdclk = g33_get_cdclk; > - else if (IS_I945GM(dev_priv)) > - dev_priv->display.get_cdclk = i945gm_get_cdclk; > - else if (IS_I945G(dev_priv)) > + break; > + case INTEL_GM45: > + dev_priv->display.get_cdclk = gm45_get_cdclk; > + break; > + case INTEL_IRONLAKE: > + dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk; > + break; > + case INTEL_SANDYBRIDGE: > + case INTEL_IVYBRIDGE: > dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; > - else if (IS_I915GM(dev_priv)) > - dev_priv->display.get_cdclk = i915gm_get_cdclk; > - else if (IS_I915G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk; > - else if (IS_I865G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk; > - else if (IS_I85X(dev_priv)) > - dev_priv->display.get_cdclk = i85x_get_cdclk; > - else if (IS_I845G(dev_priv)) > - dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk; > - else { /* 830 */ > - WARN(!IS_I830(dev_priv), > - "Unknown platform. Assuming 133 MHz CDCLK\n"); > - dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk; > + break; > + case INTEL_VALLEYVIEW: > + case INTEL_CHERRYVIEW: > + dev_priv->display.get_cdclk = vlv_get_cdclk; > + break; > + case INTEL_HASWELL: > + dev_priv->display.get_cdclk = hsw_get_cdclk; > + break; > + case INTEL_BROADWELL: > + dev_priv->display.get_cdclk = bdw_get_cdclk; > + break; > + case INTEL_SKYLAKE: > + case INTEL_KABYLAKE: > + dev_priv->display.get_cdclk = skl_get_cdclk; > + break; > + case INTEL_BROXTON: > + case INTEL_GEMINILAKE: > + dev_priv->display.get_cdclk = bxt_get_cdclk; > + break; > } > }
Em Ter, 2017-02-21 às 13:51 +0200, Ville Syrjälä escreveu: > On Mon, Feb 20, 2017 at 05:00:42PM -0300, Paulo Zanoni wrote: > > > > Possible problems of the current if-ladder: > > - It's a huge if ladder with almost a different check for each of > > our platforms. > > - It mixes 3 different types of checks: IS_GENX, IS_PLATFORM and > > IS_GROUP_OF_PLATFORMS. > > - As demonstrated by the recent IS_G4X commit, it's not easy to > > be > > sure if a platform down on the list isn't also checked earlier. > > - As demonstrated by the WARN at the end, it's not easy to be > > sure > > if we're actually checking for every single platform. > > > > Possible advantages of the new switch statement: > > - It may be easier for the compiler to optimize stuff (I didn't > > check this), especially since the values are labels of an enum. > > - The compiler will tell us in case we miss some platform. > > - All platforms are explicitly there instead of maybe hidden in > > some > > check for a certain group of platforms such as IS_GEN9_BC. > > > > Possible disadvantages with the new code: > > - A few lines bigger. > > > > v2: Don't unsort the list. Now the list almost matches the enum > > definition, with the exception of CHV, KBL and GLK, which are > > listed > > along their predecessors (Ville). > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > > --- > > drivers/gpu/drm/i915/intel_cdclk.c | 105 +++++++++++++++++++++++ > > -------------- > > 1 file changed, 66 insertions(+), 39 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c > > b/drivers/gpu/drm/i915/intel_cdclk.c > > index 942adf0..e1921fe7 100644 > > --- a/drivers/gpu/drm/i915/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/intel_cdclk.c > > @@ -1762,49 +1762,76 @@ void intel_init_cdclk_hooks(struct > > drm_i915_private *dev_priv) > > dev_priv->display.calc_cdclk_state = > > skl_calc_cdclk_state; > > } > > > > - if (IS_GEN9_BC(dev_priv)) > > - dev_priv->display.get_cdclk = skl_get_cdclk; > > - else if (IS_GEN9_LP(dev_priv)) > > - dev_priv->display.get_cdclk = bxt_get_cdclk; > > - else if (IS_BROADWELL(dev_priv)) > > - dev_priv->display.get_cdclk = bdw_get_cdclk; > > - else if (IS_HASWELL(dev_priv)) > > - dev_priv->display.get_cdclk = hsw_get_cdclk; > > - else if (IS_VALLEYVIEW(dev_priv) || > > IS_CHERRYVIEW(dev_priv)) > > - dev_priv->display.get_cdclk = vlv_get_cdclk; > > - else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) > > + switch (INTEL_INFO(dev_priv)->platform) { > > + case INTEL_PLATFORM_UNINITIALIZED: > > + MISSING_CASE(INTEL_INFO(dev_priv)->platform); > > + /* Fall through. */ > > + case INTEL_I830: > > The diff might come out nicer if you didn't reverse the list. Right > now > it's quite hard to read. On the other hand, the labels in the switch statement match the enum definition (with the exception of CHV/KBL/GLK). So IMHO this is an "easier to review the patch now vs easier to review the code later" problem. Still, I can change this, it won't hurt. > > > > > + dev_priv->display.get_cdclk = > > fixed_133mhz_get_cdclk; > > + break; > > + case INTEL_I845G: > > + dev_priv->display.get_cdclk = > > fixed_200mhz_get_cdclk; > > + break; > > + case INTEL_I85X: > > + dev_priv->display.get_cdclk = i85x_get_cdclk; > > + break; > > + case INTEL_I865G: > > + dev_priv->display.get_cdclk = > > fixed_266mhz_get_cdclk; > > + break; > > + case INTEL_I915G: > > + dev_priv->display.get_cdclk = > > fixed_333mhz_get_cdclk; > > + break; > > + case INTEL_I915GM: > > + dev_priv->display.get_cdclk = i915gm_get_cdclk; > > + break; > > + case INTEL_I945G: > > dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > - else if (IS_GEN5(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_450mhz_get_cdclk; > > - else if (IS_GM45(dev_priv)) > > - dev_priv->display.get_cdclk = gm45_get_cdclk; > > - else if (IS_G45(dev_priv)) > > + break; > > + case INTEL_I945GM: > > + dev_priv->display.get_cdclk = i945gm_get_cdclk; > > + break; > > + case INTEL_G33: > > dev_priv->display.get_cdclk = g33_get_cdclk; > > - else if (IS_I965GM(dev_priv)) > > - dev_priv->display.get_cdclk = i965gm_get_cdclk; > > - else if (IS_I965G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > - else if (IS_PINEVIEW(dev_priv)) > > + break; > > + case INTEL_PINEVIEW: > > dev_priv->display.get_cdclk = pnv_get_cdclk; > > - else if (IS_G33(dev_priv)) > > + break; > > + case INTEL_I965G: > > + dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > + break; > > + case INTEL_I965GM: > > + dev_priv->display.get_cdclk = i965gm_get_cdclk; > > + break; > > + case INTEL_G45: > > dev_priv->display.get_cdclk = g33_get_cdclk; > > - else if (IS_I945GM(dev_priv)) > > - dev_priv->display.get_cdclk = i945gm_get_cdclk; > > - else if (IS_I945G(dev_priv)) > > + break; > > + case INTEL_GM45: > > + dev_priv->display.get_cdclk = gm45_get_cdclk; > > + break; > > + case INTEL_IRONLAKE: > > + dev_priv->display.get_cdclk = > > fixed_450mhz_get_cdclk; > > + break; > > + case INTEL_SANDYBRIDGE: > > + case INTEL_IVYBRIDGE: > > dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > - else if (IS_I915GM(dev_priv)) > > - dev_priv->display.get_cdclk = i915gm_get_cdclk; > > - else if (IS_I915G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_333mhz_get_cdclk; > > - else if (IS_I865G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_266mhz_get_cdclk; > > - else if (IS_I85X(dev_priv)) > > - dev_priv->display.get_cdclk = i85x_get_cdclk; > > - else if (IS_I845G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_200mhz_get_cdclk; > > - else { /* 830 */ > > - WARN(!IS_I830(dev_priv), > > - "Unknown platform. Assuming 133 MHz > > CDCLK\n"); > > - dev_priv->display.get_cdclk = > > fixed_133mhz_get_cdclk; > > + break; > > + case INTEL_VALLEYVIEW: > > + case INTEL_CHERRYVIEW: > > + dev_priv->display.get_cdclk = vlv_get_cdclk; > > + break; > > + case INTEL_HASWELL: > > + dev_priv->display.get_cdclk = hsw_get_cdclk; > > + break; > > + case INTEL_BROADWELL: > > + dev_priv->display.get_cdclk = bdw_get_cdclk; > > + break; > > + case INTEL_SKYLAKE: > > + case INTEL_KABYLAKE: > > + dev_priv->display.get_cdclk = skl_get_cdclk; > > + break; > > + case INTEL_BROXTON: > > + case INTEL_GEMINILAKE: > > + dev_priv->display.get_cdclk = bxt_get_cdclk; > > + break; > > } > > } > > -- > > 2.7.4 >
Em Ter, 2017-02-21 às 14:26 +0200, Ander Conselvan De Oliveira escreveu: > On Mon, 2017-02-20 at 17:00 -0300, Paulo Zanoni wrote: > > > > Possible problems of the current if-ladder: > > - It's a huge if ladder with almost a different check for each of > > our platforms. > > - It mixes 3 different types of checks: IS_GENX, IS_PLATFORM and > > IS_GROUP_OF_PLATFORMS. > > - As demonstrated by the recent IS_G4X commit, it's not easy to > > be > > sure if a platform down on the list isn't also checked earlier. > > - As demonstrated by the WARN at the end, it's not easy to be > > sure > > if we're actually checking for every single platform. > > > > Possible advantages of the new switch statement: > > - It may be easier for the compiler to optimize stuff (I didn't > > check this), especially since the values are labels of an enum. > > - The compiler will tell us in case we miss some platform. > > - All platforms are explicitly there instead of maybe hidden in > > some > > check for a certain group of platforms such as IS_GEN9_BC. > > > > Possible disadvantages with the new code: > > - A few lines bigger. > > I had suggested something different at some point, but didn't get > around to > implementing it yet: > > https://lists.freedesktop.org/archives/intel-gfx/2016-December/115078 > .html > > I think that if we need almost one case for each single platform, > might as well > put these in device info. Anyway, I didn't check how well that > proposal works > with the changes in this series, but figured I mention it anyway in > case it > helps. That approach would still work. I can drop this patch if you're still planning to implement that, no problem. The only patch from this series that I really want to upstream is patch 1. The value of this specific 3/3 patch was greatly decreased after Ville sorted the platform if ladder, but I decided to send it anyway since I already had it (and since I wanted to test people's reactions to using the platform enum in a switch statement). > > Ander > > > > > > > > v2: Don't unsort the list. Now the list almost matches the enum > > definition, with the exception of CHV, KBL and GLK, which are > > listed > > along their predecessors (Ville). > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > > --- > > drivers/gpu/drm/i915/intel_cdclk.c | 105 +++++++++++++++++++++++ > > -------------- > > 1 file changed, 66 insertions(+), 39 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c > > b/drivers/gpu/drm/i915/intel_cdclk.c > > index 942adf0..e1921fe7 100644 > > --- a/drivers/gpu/drm/i915/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/intel_cdclk.c > > @@ -1762,49 +1762,76 @@ void intel_init_cdclk_hooks(struct > > drm_i915_private *dev_priv) > > dev_priv->display.calc_cdclk_state = > > skl_calc_cdclk_state; > > } > > > > - if (IS_GEN9_BC(dev_priv)) > > - dev_priv->display.get_cdclk = skl_get_cdclk; > > - else if (IS_GEN9_LP(dev_priv)) > > - dev_priv->display.get_cdclk = bxt_get_cdclk; > > - else if (IS_BROADWELL(dev_priv)) > > - dev_priv->display.get_cdclk = bdw_get_cdclk; > > - else if (IS_HASWELL(dev_priv)) > > - dev_priv->display.get_cdclk = hsw_get_cdclk; > > - else if (IS_VALLEYVIEW(dev_priv) || > > IS_CHERRYVIEW(dev_priv)) > > - dev_priv->display.get_cdclk = vlv_get_cdclk; > > - else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) > > + switch (INTEL_INFO(dev_priv)->platform) { > > + case INTEL_PLATFORM_UNINITIALIZED: > > + MISSING_CASE(INTEL_INFO(dev_priv)->platform); > > + /* Fall through. */ > > + case INTEL_I830: > > + dev_priv->display.get_cdclk = > > fixed_133mhz_get_cdclk; > > + break; > > + case INTEL_I845G: > > + dev_priv->display.get_cdclk = > > fixed_200mhz_get_cdclk; > > + break; > > + case INTEL_I85X: > > + dev_priv->display.get_cdclk = i85x_get_cdclk; > > + break; > > + case INTEL_I865G: > > + dev_priv->display.get_cdclk = > > fixed_266mhz_get_cdclk; > > + break; > > + case INTEL_I915G: > > + dev_priv->display.get_cdclk = > > fixed_333mhz_get_cdclk; > > + break; > > + case INTEL_I915GM: > > + dev_priv->display.get_cdclk = i915gm_get_cdclk; > > + break; > > + case INTEL_I945G: > > dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > - else if (IS_GEN5(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_450mhz_get_cdclk; > > - else if (IS_GM45(dev_priv)) > > - dev_priv->display.get_cdclk = gm45_get_cdclk; > > - else if (IS_G45(dev_priv)) > > + break; > > + case INTEL_I945GM: > > + dev_priv->display.get_cdclk = i945gm_get_cdclk; > > + break; > > + case INTEL_G33: > > dev_priv->display.get_cdclk = g33_get_cdclk; > > - else if (IS_I965GM(dev_priv)) > > - dev_priv->display.get_cdclk = i965gm_get_cdclk; > > - else if (IS_I965G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > - else if (IS_PINEVIEW(dev_priv)) > > + break; > > + case INTEL_PINEVIEW: > > dev_priv->display.get_cdclk = pnv_get_cdclk; > > - else if (IS_G33(dev_priv)) > > + break; > > + case INTEL_I965G: > > + dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > + break; > > + case INTEL_I965GM: > > + dev_priv->display.get_cdclk = i965gm_get_cdclk; > > + break; > > + case INTEL_G45: > > dev_priv->display.get_cdclk = g33_get_cdclk; > > - else if (IS_I945GM(dev_priv)) > > - dev_priv->display.get_cdclk = i945gm_get_cdclk; > > - else if (IS_I945G(dev_priv)) > > + break; > > + case INTEL_GM45: > > + dev_priv->display.get_cdclk = gm45_get_cdclk; > > + break; > > + case INTEL_IRONLAKE: > > + dev_priv->display.get_cdclk = > > fixed_450mhz_get_cdclk; > > + break; > > + case INTEL_SANDYBRIDGE: > > + case INTEL_IVYBRIDGE: > > dev_priv->display.get_cdclk = > > fixed_400mhz_get_cdclk; > > - else if (IS_I915GM(dev_priv)) > > - dev_priv->display.get_cdclk = i915gm_get_cdclk; > > - else if (IS_I915G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_333mhz_get_cdclk; > > - else if (IS_I865G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_266mhz_get_cdclk; > > - else if (IS_I85X(dev_priv)) > > - dev_priv->display.get_cdclk = i85x_get_cdclk; > > - else if (IS_I845G(dev_priv)) > > - dev_priv->display.get_cdclk = > > fixed_200mhz_get_cdclk; > > - else { /* 830 */ > > - WARN(!IS_I830(dev_priv), > > - "Unknown platform. Assuming 133 MHz > > CDCLK\n"); > > - dev_priv->display.get_cdclk = > > fixed_133mhz_get_cdclk; > > + break; > > + case INTEL_VALLEYVIEW: > > + case INTEL_CHERRYVIEW: > > + dev_priv->display.get_cdclk = vlv_get_cdclk; > > + break; > > + case INTEL_HASWELL: > > + dev_priv->display.get_cdclk = hsw_get_cdclk; > > + break; > > + case INTEL_BROADWELL: > > + dev_priv->display.get_cdclk = bdw_get_cdclk; > > + break; > > + case INTEL_SKYLAKE: > > + case INTEL_KABYLAKE: > > + dev_priv->display.get_cdclk = skl_get_cdclk; > > + break; > > + case INTEL_BROXTON: > > + case INTEL_GEMINILAKE: > > + dev_priv->display.get_cdclk = bxt_get_cdclk; > > + break; > > } > > } > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index 942adf0..e1921fe7 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -1762,49 +1762,76 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv) dev_priv->display.calc_cdclk_state = skl_calc_cdclk_state; } - if (IS_GEN9_BC(dev_priv)) - dev_priv->display.get_cdclk = skl_get_cdclk; - else if (IS_GEN9_LP(dev_priv)) - dev_priv->display.get_cdclk = bxt_get_cdclk; - else if (IS_BROADWELL(dev_priv)) - dev_priv->display.get_cdclk = bdw_get_cdclk; - else if (IS_HASWELL(dev_priv)) - dev_priv->display.get_cdclk = hsw_get_cdclk; - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) - dev_priv->display.get_cdclk = vlv_get_cdclk; - else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv)) + switch (INTEL_INFO(dev_priv)->platform) { + case INTEL_PLATFORM_UNINITIALIZED: + MISSING_CASE(INTEL_INFO(dev_priv)->platform); + /* Fall through. */ + case INTEL_I830: + dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk; + break; + case INTEL_I845G: + dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk; + break; + case INTEL_I85X: + dev_priv->display.get_cdclk = i85x_get_cdclk; + break; + case INTEL_I865G: + dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk; + break; + case INTEL_I915G: + dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk; + break; + case INTEL_I915GM: + dev_priv->display.get_cdclk = i915gm_get_cdclk; + break; + case INTEL_I945G: dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; - else if (IS_GEN5(dev_priv)) - dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk; - else if (IS_GM45(dev_priv)) - dev_priv->display.get_cdclk = gm45_get_cdclk; - else if (IS_G45(dev_priv)) + break; + case INTEL_I945GM: + dev_priv->display.get_cdclk = i945gm_get_cdclk; + break; + case INTEL_G33: dev_priv->display.get_cdclk = g33_get_cdclk; - else if (IS_I965GM(dev_priv)) - dev_priv->display.get_cdclk = i965gm_get_cdclk; - else if (IS_I965G(dev_priv)) - dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; - else if (IS_PINEVIEW(dev_priv)) + break; + case INTEL_PINEVIEW: dev_priv->display.get_cdclk = pnv_get_cdclk; - else if (IS_G33(dev_priv)) + break; + case INTEL_I965G: + dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; + break; + case INTEL_I965GM: + dev_priv->display.get_cdclk = i965gm_get_cdclk; + break; + case INTEL_G45: dev_priv->display.get_cdclk = g33_get_cdclk; - else if (IS_I945GM(dev_priv)) - dev_priv->display.get_cdclk = i945gm_get_cdclk; - else if (IS_I945G(dev_priv)) + break; + case INTEL_GM45: + dev_priv->display.get_cdclk = gm45_get_cdclk; + break; + case INTEL_IRONLAKE: + dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk; + break; + case INTEL_SANDYBRIDGE: + case INTEL_IVYBRIDGE: dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk; - else if (IS_I915GM(dev_priv)) - dev_priv->display.get_cdclk = i915gm_get_cdclk; - else if (IS_I915G(dev_priv)) - dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk; - else if (IS_I865G(dev_priv)) - dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk; - else if (IS_I85X(dev_priv)) - dev_priv->display.get_cdclk = i85x_get_cdclk; - else if (IS_I845G(dev_priv)) - dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk; - else { /* 830 */ - WARN(!IS_I830(dev_priv), - "Unknown platform. Assuming 133 MHz CDCLK\n"); - dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk; + break; + case INTEL_VALLEYVIEW: + case INTEL_CHERRYVIEW: + dev_priv->display.get_cdclk = vlv_get_cdclk; + break; + case INTEL_HASWELL: + dev_priv->display.get_cdclk = hsw_get_cdclk; + break; + case INTEL_BROADWELL: + dev_priv->display.get_cdclk = bdw_get_cdclk; + break; + case INTEL_SKYLAKE: + case INTEL_KABYLAKE: + dev_priv->display.get_cdclk = skl_get_cdclk; + break; + case INTEL_BROXTON: + case INTEL_GEMINILAKE: + dev_priv->display.get_cdclk = bxt_get_cdclk; + break; } }
Possible problems of the current if-ladder: - It's a huge if ladder with almost a different check for each of our platforms. - It mixes 3 different types of checks: IS_GENX, IS_PLATFORM and IS_GROUP_OF_PLATFORMS. - As demonstrated by the recent IS_G4X commit, it's not easy to be sure if a platform down on the list isn't also checked earlier. - As demonstrated by the WARN at the end, it's not easy to be sure if we're actually checking for every single platform. Possible advantages of the new switch statement: - It may be easier for the compiler to optimize stuff (I didn't check this), especially since the values are labels of an enum. - The compiler will tell us in case we miss some platform. - All platforms are explicitly there instead of maybe hidden in some check for a certain group of platforms such as IS_GEN9_BC. Possible disadvantages with the new code: - A few lines bigger. v2: Don't unsort the list. Now the list almost matches the enum definition, with the exception of CHV, KBL and GLK, which are listed along their predecessors (Ville). Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/intel_cdclk.c | 105 +++++++++++++++++++++++-------------- 1 file changed, 66 insertions(+), 39 deletions(-)