| Message ID | 1489458574-5556-1-git-send-email-andy.tang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Mar 14, 2017 at 10:29:34AM +0800, Yuantian Tang wrote: > Updated sata node to add ecc register address and dma coherence > property. > Enable sata on ls1012a platforms as well. > > Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Applied, thanks. A side note: we usually use present rather than past tense in patch subject. Shawn
> -----Original Message----- > From: Shawn Guo [mailto:shawnguo@kernel.org] > Sent: Tuesday, March 14, 2017 4:16 PM > To: Andy Tang > Cc: mark.rutland@arm.com; devicetree@vger.kernel.org; > catalin.marinas@arm.com; will.deacon@arm.com; robh+dt@kernel.org; > linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH] arm64: dts: updated sata node on ls1012a platform > > On Tue, Mar 14, 2017 at 10:29:34AM +0800, Yuantian Tang wrote: > > Updated sata node to add ecc register address and dma coherence > > property. > > Enable sata on ls1012a platforms as well. > > > > Signed-off-by: Tang Yuantian <andy.tang@nxp.com> > > Applied, thanks. > > A side note: we usually use present rather than past tense in patch subject. > Point taken, thanks, Regards, Yuantian > Shawn
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts index a619f64..17fae81 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts @@ -113,3 +113,7 @@ &sai2 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts index 14a67f1..e2a93d5 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts @@ -126,3 +126,7 @@ &sai2 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts index 62c5c71..ed77f6b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts @@ -57,3 +57,7 @@ &i2c0 { status = "okay"; }; + +&sata { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index d9d9b0f..65939bd 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -314,9 +314,12 @@ sata: sata@3200000 { compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>; + reg = <0x0 0x3200000 0x0 0x10000>, + <0x0 0x20140520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen 4 0>; + dma-coherent; status = "disabled"; }; };
Updated sata node to add ecc register address and dma coherence property. Enable sata on ls1012a platforms as well. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 4 ++++ arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 4 ++++ arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 4 ++++ arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 5 ++++- 4 files changed, 16 insertions(+), 1 deletion(-)