[5/8] ARM64: dts: meson-gxbb: add i2s output pins

Commit Message

Jerome Brunet March 23, 2017, 4:50 p.m. UTC

Signed-off-by: Jerome Brunet <[e-mail]>
---
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 63 +++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

Comments

Linus Walleij March 28, 2017, 1:15 p.m. UTC | #1

On Thu, Mar 23, 2017 at 5:50 PM, Jerome Brunet <[e-mail]> wrote:

> Signed-off-by: Jerome Brunet <[e-mail]>

Acked-by: Linus Walleij <[e-mail]>

For this and the other Meson DTS patches.

Please funnel these through the apropriate ARM SoC-feed tree.

Yours,
Linus Walleij

Jerome Brunet March 28, 2017, 3:34 p.m. UTC | #2

On Tue, 2017-03-28 at 15:15 +0200, Linus Walleij wrote:
> On Thu, Mar 23, 2017 at 5:50 PM, Jerome Brunet <[e-mail]> wrote:
> 
> > Signed-off-by: Jerome Brunet <[e-mail]>
> 
> Acked-by: Linus Walleij <[e-mail]>
> 
> For this and the other Meson DTS patches.
> 
> Please funnel these through the apropriate ARM SoC-feed tree.

Kevin,
You may want to take the ones from the v2 I sent later. There is less chance of
conflict with  Neil's patches.

Cheers
Jerome

> 
> Yours,
> Linus Walleij

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 04b3324bc132..5ce70e1ec9ae 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -203,6 +203,48 @@ 
 				function = "pwm_ao_b";
 			};
 		};
+
+		i2s_am_clk_pins: i2s_am_clk {
+			mux {
+				groups = "i2s_am_clk";
+				function = "i2s_out_ao";
+			};
+		};
+
+		i2s_out_ao_clk_pins: i2s_out_ao_clk {
+			mux {
+				groups = "i2s_out_ao_clk";
+				function = "i2s_out_ao";
+			};
+		};
+
+		i2s_out_lr_clk_pins: i2s_out_lr_clk {
+			mux {
+				groups = "i2s_out_lr_clk";
+				function = "i2s_out_ao";
+			};
+		};
+
+		i2s_out_ch01_ao_pins: i2s_out_ch01_ao {
+			mux {
+				groups = "i2s_out_ch01_ao";
+				function = "i2s_out_ao";
+			};
+		};
+
+		i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
+			mux {
+				groups = "i2s_out_ch23_ao";
+				function = "i2s_out_ao";
+			};
+		};
+
+		i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
+			mux {
+				groups = "i2s_out_ch45_ao";
+				function = "i2s_out_ao";
+			};
+		};
 	};
 
 	clkc_AO: clock-controller@040 {
@@ -467,6 +509,27 @@ 
 				function = "hdmi_i2c";
 			};
 		};
+
+		i2sout_ch23_y_pins: i2sout_ch23_y {
+			mux {
+				groups = "i2sout_ch23_y";
+				function = "i2s_out";
+			};
+		};
+
+		i2sout_ch45_y_pins: i2sout_ch45_y {
+			mux {
+				groups = "i2sout_ch45_y";
+				function = "i2s_out";
+			};
+		};
+
+		i2sout_ch67_y_pins: i2sout_ch67_y {
+			mux {
+				groups = "i2sout_ch67_y";
+				function = "i2s_out";
+			};
+		};
 	};
 };