| Message ID | 20170404184518.33610-1-icenowy@aosc.io (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Apr 05, 2017 at 02:45:16AM +0800, Icenowy Zheng wrote: > Allwinner A64 SoC features a switchable PHY0 like the one in H3, which > can switch between a MUSB controller and a pair of OHCI/EHCI controller. > > Enable PHY0 route auto switching for A64. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Thanks, Maxime
On Wednesday 05 April 2017 12:33 PM, Maxime Ripard wrote: > On Wed, Apr 05, 2017 at 02:45:16AM +0800, Icenowy Zheng wrote: >> Allwinner A64 SoC features a switchable PHY0 like the one in H3, which >> can switch between a MUSB controller and a pair of OHCI/EHCI controller. >> >> Enable PHY0 route auto switching for A64. >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > > Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> merged, thanks. -Kishon
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c index f86a2574b953..bbf06cfe5898 100644 --- a/drivers/phy/phy-sun4i-usb.c +++ b/drivers/phy/phy-sun4i-usb.c @@ -858,6 +858,7 @@ static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = { .phyctl_offset = REG_PHYCTL_A33, .dedicated_clocks = true, .enable_pmu_unk1 = true, + .phy0_dual_route = true, }; static const struct of_device_id sun4i_usb_phy_of_match[] = {
Allwinner A64 SoC features a switchable PHY0 like the one in H3, which can switch between a MUSB controller and a pair of OHCI/EHCI controller. Enable PHY0 route auto switching for A64. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> --- drivers/phy/phy-sun4i-usb.c | 1 + 1 file changed, 1 insertion(+)