| Message ID | 20170406123343.23423-3-haozhong.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
>>> On 06.04.17 at 14:33, <haozhong.zhang@intel.com> wrote: > The current 'severity_cpu' is used by both mcheck_cmn_handler() and > mce_softirq(). If MC# happens during mce_softirq(), the values set in > mcheck_cmn_handler() and mce_softirq() may interfere with each > other. Use private 'severity_cpu' for each function to fix this issue. > > Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> Other than patch 1 I think this qualifies for 4.9. Jan
>>> On 07.04.17 at 15:48, <JBeulich@suse.com> wrote: >>>> On 06.04.17 at 14:33, <haozhong.zhang@intel.com> wrote: >> The current 'severity_cpu' is used by both mcheck_cmn_handler() and >> mce_softirq(). If MC# happens during mce_softirq(), the values set in >> mcheck_cmn_handler() and mce_softirq() may interfere with each >> other. Use private 'severity_cpu' for each function to fix this issue. >> >> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> > > Reviewed-by: Jan Beulich <jbeulich@suse.com> > > Other than patch 1 I think this qualifies for 4.9. And for that reason it is generally better to put bug fixes first in your series, and pure cleanup last. This patch will now need re-basing and the committed patch 2 (which I did adjust as necessary to apply on its own). Jan
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 437d155..a2e9668 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -182,7 +182,6 @@ void mce_need_clearbank_register(mce_need_clearbank_t cbfunc) */ static DEFINE_SPINLOCK(mce_logout_lock); -static atomic_t severity_cpu = ATOMIC_INIT(-1); static atomic_t found_error = ATOMIC_INIT(0); static cpumask_t mce_fatal_cpus; @@ -450,6 +449,7 @@ static int mce_urgent_action(const struct cpu_user_regs *regs, void mcheck_cmn_handler(const struct cpu_user_regs *regs) { static DEFINE_MCE_BARRIER(mce_trap_bar); + static atomic_t severity_cpu = ATOMIC_INIT(-1); struct mca_banks *bankmask = mca_allbanks; struct mca_banks *clear_bank = __get_cpu_var(mce_clear_banks); uint64_t gstatus; @@ -1697,6 +1697,7 @@ static void mce_softirq(void) { static DEFINE_MCE_BARRIER(mce_inside_bar); static DEFINE_MCE_BARRIER(mce_severity_bar); + static atomic_t severity_cpu; int cpu = smp_processor_id(); unsigned int workcpu;
The current 'severity_cpu' is used by both mcheck_cmn_handler() and mce_softirq(). If MC# happens during mce_softirq(), the values set in mcheck_cmn_handler() and mce_softirq() may interfere with each other. Use private 'severity_cpu' for each function to fix this issue. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> --- xen/arch/x86/cpu/mcheck/mce.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)