| Message ID | 1491981044-24635-1-git-send-email-kever.yang@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Am Mittwoch, 12. April 2017, 15:10:41 CEST schrieb Kever Yang: > Add qos setting reg for some peripheral like sd, usb, pcie. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> applied for 4.13 Thanks Heiko
Am Mittwoch, 12. April 2017, 15:10:43 CEST schrieb Kever Yang: > Use command below to replace the IO naming in pinctrl: > sed -i -e 's/ 31 RK_FUNC_/ RK_PD7 RK_FUNC_/' arch/arm/boot/dts/rk* > sed -i -e 's/ 0 RK_FUNC_/ RK_PA0 RK_FUNC_/' > arch/arm64/boot/dts/rockchip/* > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> I'm not sure, if we really want to mass-convert each and every pin. All pins in use right now seem to be working and it hides other history/blame for these entries. In any case though, this needs to be split into separate arm32/arm64 patches. Heiko
Heiko, On 05/10/2017 05:43 AM, Heiko Stuebner wrote: > Am Mittwoch, 12. April 2017, 15:10:43 CEST schrieb Kever Yang: >> Use command below to replace the IO naming in pinctrl: >> sed -i -e 's/ 31 RK_FUNC_/ RK_PD7 RK_FUNC_/' arch/arm/boot/dts/rk* >> sed -i -e 's/ 0 RK_FUNC_/ RK_PA0 RK_FUNC_/' >> arch/arm64/boot/dts/rockchip/* >> >> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > I'm not sure, if we really want to mass-convert each and every pin. > All pins in use right now seem to be working and it hides other > history/blame for these entries. Do you mean you want to leave the code already there as is, and new code using MACRO define for IO? This sounds reasonable, I can agree on this. I send this patch because I see there is a patch from Andy using MACRO for many IOs, but not complete enough and my patch suppose to make all Rockchip IO has update. Thanks, - Kever > > In any case though, this needs to be split into separate arm32/arm64 > patches. > > > Heiko >
Hi Kever, Am Mittwoch, 10. Mai 2017, 09:25:25 CEST schrieb Kever Yang: > On 05/10/2017 05:43 AM, Heiko Stuebner wrote: > > Am Mittwoch, 12. April 2017, 15:10:43 CEST schrieb Kever Yang: > >> Use command below to replace the IO naming in pinctrl: > >> sed -i -e 's/ 31 RK_FUNC_/ RK_PD7 RK_FUNC_/' arch/arm/boot/dts/rk* > >> sed -i -e 's/ 0 RK_FUNC_/ RK_PA0 RK_FUNC_/' > >> arch/arm64/boot/dts/rockchip/* > >> > >> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > > I'm not sure, if we really want to mass-convert each and every pin. > > All pins in use right now seem to be working and it hides other > > history/blame for these entries. > > Do you mean you want to leave the code already there as is, and new > code using MACRO define for IO? > > This sounds reasonable, I can agree on this. I send this patch because I > see there is > a patch from Andy using MACRO for many IOs, but not complete enough > and my patch suppose to make all Rockchip IO has update. As I said, I'm really not sure. On the one hand it's nicer and it will be easier to check devicetree against schematics, but mass-converting them makes me anxious. Andy did convert the rk3288-popmetal board which is somewhat sparsely used I think. If anything breaks with Firefly, Rock, Veyron etc we might make a lot of people unhappy :-) . But having boards use both paradigms at the same time (pin number and names) could also be confusing. > > In any case though, this needs to be split into separate arm32/arm64 > > patches. Maybe we could split not only on the arm/arm64 border, but also on something like soc-level (rk3188, rk3288, rk3368). That way the amount of changes per patch would go down making review easier :-) . Just to make sure you saw it, I've also had to drop patch2 again (see separate response from yesterday). Heiko
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index f4f3c96..387ae34 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -769,11 +769,6 @@ status = "disabled"; }; - qos_sd: qos@ffa74000 { - compatible = "syscon"; - reg = <0x0 0xffa74000 0x0 0x20>; - }; - qos_emmc: qos@ffa58000 { compatible = "syscon"; reg = <0x0 0xffa58000 0x0 0x20>; @@ -784,6 +779,41 @@ reg = <0x0 0xffa5c000 0x0 0x20>; }; + qos_pcie: qos@ffa60080 { + compatible = "syscon"; + reg = <0x0 0xffa60080 0x0 0x20>; + }; + + qos_usb_host0: qos@ffa60100 { + compatible = "syscon"; + reg = <0x0 0xffa60100 0x0 0x20>; + }; + + qos_usb_host1: qos@ffa60180 { + compatible = "syscon"; + reg = <0x0 0xffa60180 0x0 0x20>; + }; + + qos_usb_otg0: qos@ffa70000 { + compatible = "syscon"; + reg = <0x0 0xffa70000 0x0 0x20>; + }; + + qos_usb_otg1: qos@ffa70080 { + compatible = "syscon"; + reg = <0x0 0xffa70080 0x0 0x20>; + }; + + qos_sd: qos@ffa74000 { + compatible = "syscon"; + reg = <0x0 0xffa74000 0x0 0x20>; + }; + + qos_sdioaudio: qos@ffa76000 { + compatible = "syscon"; + reg = <0x0 0xffa76000 0x0 0x20>; + }; + qos_hdcp: qos@ffa90000 { compatible = "syscon"; reg = <0x0 0xffa90000 0x0 0x20>; @@ -854,6 +884,11 @@ reg = <0x0 0xffad0000 0x0 0x20>; }; + qos_perihp: qos@ffad8080 { + compatible = "syscon"; + reg = <0x0 0xffad8080 0x0 0x20>; + }; + qos_gpu: qos@ffae0000 { compatible = "syscon"; reg = <0x0 0xffae0000 0x0 0x20>;
Add qos setting reg for some peripheral like sd, usb, pcie. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 45 ++++++++++++++++++++++++++++---- 1 file changed, 40 insertions(+), 5 deletions(-)