diff mbox

[v6,3/9] drm/i915: Drop AUX backlight enable check for backlight control

Message ID 20170509234052.189575-4-puthik@chromium.org (mailing list archive)
State New, archived
Headers show

Commit Message

Puthikorn Voravootivat May 9, 2017, 11:40 p.m. UTC 
There are some panel that
(1) does not support display backlight enable via AUX
(2) support display backlight adjustment via AUX
(3) support display backlight enable via eDP BL_ENABLE pin

The current driver required that (1) must be support to enable (2).
This patch drops that requirement.

Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>
---
 drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Dhinakaran Pandiyan May 11, 2017, 12:39 a.m. UTC | #1 
On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote:
> There are some panel that

> (1) does not support display backlight enable via AUX

> (2) support display backlight adjustment via AUX

> (3) support display backlight enable via eDP BL_ENABLE pin

> 

> The current driver required that (1) must be support to enable (2).

> This patch drops that requirement.

> 

> Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>

> ---

>  drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 5 ++++-

>  1 file changed, 4 insertions(+), 1 deletion(-)

> 

> diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c

> index 870c03fc0f3a..c22712762957 100644

> --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c

> +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c

> @@ -28,6 +28,10 @@ static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)

>  {

>  	uint8_t reg_val = 0;

>  

> +       /* Early return when display use other mechanism to enable backlight. */

> +	if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP))

> +		return;


Won't DP_EDP_BACKLIGHT_AUX_ENABLE_CAP be 1 always? The code below, in
intel_dp_aux_display_control_capable(), makes sure
DP_EDP_BACKLIGHT_PIN_ENABLE_CAP=0. The spec says at least one of these
has to be 1.


"BACKLIGHT_AUX_ENABLE_CAPABLE
1 = Indicates that the Sink device supports display backlight
enable through the BACKLIGHT_ENABLE bit in the
EDP_DISPLAY_CONTROL register (DPCD Address 00720h, bit 0).
Must be set to 1 if the BACKLIGHT_PIN_ENABLE_CAPABLE bit (bit 1)
is cleared to 0."

-DK

> +

>  	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,

>  			      &reg_val) < 0) {

>  		DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",

> @@ -164,7 +168,6 @@ intel_dp_aux_display_control_capable(struct intel_connector *connector)

>  	 * the panel can support backlight control over the aux channel

>  	 */

>  	if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP &&

> -	    (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) &&

>  	    (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) &&

>  	    !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) ||

>  	      (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) {
Puthikorn Voravootivat May 11, 2017, 9:01 p.m. UTC | #2 
On Wed, May 10, 2017 at 5:39 PM, Pandiyan, Dhinakaran <
dhinakaran.pandiyan@intel.com> wrote:

> On Tue, 2017-05-09 at 16:40 -0700, Puthikorn Voravootivat wrote:
> > There are some panel that
> > (1) does not support display backlight enable via AUX
> > (2) support display backlight adjustment via AUX
> > (3) support display backlight enable via eDP BL_ENABLE pin
> >
> > The current driver required that (1) must be support to enable (2).
> > This patch drops that requirement.
> >
> > Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org>
> > ---
> >  drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> > index 870c03fc0f3a..c22712762957 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> > @@ -28,6 +28,10 @@ static void set_aux_backlight_enable(struct intel_dp
> *intel_dp, bool enable)
> >  {
> >       uint8_t reg_val = 0;
> >
> > +       /* Early return when display use other mechanism to enable
> backlight. */
> > +     if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP))
> > +             return;
>
> Won't DP_EDP_BACKLIGHT_AUX_ENABLE_CAP be 1 always? The code below, in
> intel_dp_aux_display_control_capable(), makes sure
> DP_EDP_BACKLIGHT_PIN_ENABLE_CAP=0. The spec says at least one of these
> has to be 1.
>
> We will drop the  DP_EDP_BACKLIGHT_PIN_ENABLE_CAP != 0 check in next
patch set.
This patch adds check here to prepare for that.

>
> "BACKLIGHT_AUX_ENABLE_CAPABLE
> 1 = Indicates that the Sink device supports display backlight
> enable through the BACKLIGHT_ENABLE bit in the
> EDP_DISPLAY_CONTROL register (DPCD Address 00720h, bit 0).
> Must be set to 1 if the BACKLIGHT_PIN_ENABLE_CAPABLE bit (bit 1)
> is cleared to 0."
>
> -DK
>
> > +
> >       if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_
> REGISTER,
> >                             &reg_val) < 0) {
> >               DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
> > @@ -164,7 +168,6 @@ intel_dp_aux_display_control_capable(struct
> intel_connector *connector)
> >        * the panel can support backlight control over the aux channel
> >        */
> >       if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP
> &&
> > -         (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) &&
> >           (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP)
> &&
> >           !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) ||
> >             (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)))
> {
>
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
index 870c03fc0f3a..c22712762957 100644
--- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
@@ -28,6 +28,10 @@  static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)
 {
 	uint8_t reg_val = 0;
 
+       /* Early return when display use other mechanism to enable backlight. */
+	if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP))
+		return;
+
 	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER,
 			      &reg_val) < 0) {
 		DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n",
@@ -164,7 +168,6 @@  intel_dp_aux_display_control_capable(struct intel_connector *connector)
 	 * the panel can support backlight control over the aux channel
 	 */
 	if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP &&
-	    (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) &&
 	    (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP) &&
 	    !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) ||
 	      (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) {