| Message ID | 20170515083437.31394-3-mahesh1.kumar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, May 15, 2017 at 02:04:27PM +0530, Mahesh Kumar wrote: > From: "Kumar, Mahesh" <mahesh1.kumar@intel.com> > > This patch adds few wrapper to perform fixed_point_16_16 operations > mul_round_up_u32_fixed16 : Multiplies u32 and fixed_16_16_t variables > & returns u32 result with rounding-up. > mul_fixed16 : Multiplies two fixed_16_16_t variable & returns fixed_16_16 > div_round_up_fixed16 : Perform division operation on fixed_16_16_t > variables & return u32 result with round-off > div_round_up_u32_fixed16 : devide uint32_t variable by fixed_16_16 variable > and round_up the result to uint32_t. > > These wrappers will be used by later patches in the series. > > Changes from V1: > - Rename wrapper as per Matt's comment > > Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 43 +++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index f56fa1f71c11..a1858c3eb33a 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -153,6 +153,38 @@ static inline uint_fixed_16_16_t max_fixed_16_16(uint_fixed_16_16_t max1, > return max; > } > > +static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val, > + uint_fixed_16_16_t d) > +{ > + return DIV_ROUND_UP(val.val, d.val); > +} > + > +static inline uint32_t mul_round_up_u32_fixed16(uint32_t val, > + uint_fixed_16_16_t mul) > +{ > + uint64_t intermediate_val; > + uint32_t result; > + > + intermediate_val = (uint64_t) val * mul.val; > + intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16); > + WARN_ON(intermediate_val >> 32); > + result = clamp_t(uint32_t, intermediate_val, 0, ~0); > + return result; > +} It looks like the indentation of this function is wrong (spaces instead of tabs). With that fixed, Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > + > +static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val, > + uint_fixed_16_16_t mul) > +{ > + uint64_t intermediate_val; > + uint_fixed_16_16_t fp; > + > + intermediate_val = (uint64_t) val.val * mul.val; > + intermediate_val = intermediate_val >> 16; > + WARN_ON(intermediate_val >> 32); > + fp.val = clamp_t(uint32_t, intermediate_val, 0, ~0); > + return fp; > +} > + > static inline uint_fixed_16_16_t fixed_16_16_div(uint32_t val, uint32_t d) > { > uint_fixed_16_16_t fp, res; > @@ -175,6 +207,17 @@ static inline uint_fixed_16_16_t fixed_16_16_div_u64(uint32_t val, uint32_t d) > return res; > } > > +static inline uint32_t div_round_up_u32_fixed16(uint32_t val, > + uint_fixed_16_16_t d) > +{ > + uint64_t interm_val; > + > + interm_val = (uint64_t)val << 16; > + interm_val = DIV_ROUND_UP_ULL(interm_val, d.val); > + WARN_ON(interm_val >> 32); > + return clamp_t(uint32_t, interm_val, 0, ~0); > +} > + > static inline uint_fixed_16_16_t mul_u32_fixed_16_16(uint32_t val, > uint_fixed_16_16_t mul) > { > -- > 2.11.0 >
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f56fa1f71c11..a1858c3eb33a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -153,6 +153,38 @@ static inline uint_fixed_16_16_t max_fixed_16_16(uint_fixed_16_16_t max1, return max; } +static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val, + uint_fixed_16_16_t d) +{ + return DIV_ROUND_UP(val.val, d.val); +} + +static inline uint32_t mul_round_up_u32_fixed16(uint32_t val, + uint_fixed_16_16_t mul) +{ + uint64_t intermediate_val; + uint32_t result; + + intermediate_val = (uint64_t) val * mul.val; + intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16); + WARN_ON(intermediate_val >> 32); + result = clamp_t(uint32_t, intermediate_val, 0, ~0); + return result; +} + +static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val, + uint_fixed_16_16_t mul) +{ + uint64_t intermediate_val; + uint_fixed_16_16_t fp; + + intermediate_val = (uint64_t) val.val * mul.val; + intermediate_val = intermediate_val >> 16; + WARN_ON(intermediate_val >> 32); + fp.val = clamp_t(uint32_t, intermediate_val, 0, ~0); + return fp; +} + static inline uint_fixed_16_16_t fixed_16_16_div(uint32_t val, uint32_t d) { uint_fixed_16_16_t fp, res; @@ -175,6 +207,17 @@ static inline uint_fixed_16_16_t fixed_16_16_div_u64(uint32_t val, uint32_t d) return res; } +static inline uint32_t div_round_up_u32_fixed16(uint32_t val, + uint_fixed_16_16_t d) +{ + uint64_t interm_val; + + interm_val = (uint64_t)val << 16; + interm_val = DIV_ROUND_UP_ULL(interm_val, d.val); + WARN_ON(interm_val >> 32); + return clamp_t(uint32_t, interm_val, 0, ~0); +} + static inline uint_fixed_16_16_t mul_u32_fixed_16_16(uint32_t val, uint_fixed_16_16_t mul) {