diff mbox

[v2,1/4] arm: dts: rk322x: add some assigned-clocks

Message ID 1495016177-2413-2-git-send-email-frank.wang@rock-chips.com (mailing list archive)
State New, archived
Headers show

Commit Message

Frank Wang May 17, 2017, 10:16 a.m. UTC 
From: Elaine Zhang <zhangqing@rock-chips.com>

Add CPLL, GPLL and some other assigned-clocks for rk322x SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
---
 arch/arm/boot/dts/rk322x.dtsi | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

Comments

Heiko Stuebner May 19, 2017, 11:18 a.m. UTC | #1 
Am Mittwoch, 17. Mai 2017, 18:16:14 CEST schrieb Frank Wang:
> From: Elaine Zhang <zhangqing@rock-chips.com>
> 
> Add CPLL, GPLL and some other assigned-clocks for rk322x SoC.
> 
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

applied for 4.13 after adapting subject and commit message a bit


Thanks
Heiko
diff mbox

Patch

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f7498b3..64368b0 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -346,8 +346,18 @@ 
 		rockchip,grf = <&grf>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
-		assigned-clocks = <&cru PLL_GPLL>;
-		assigned-clock-rates = <594000000>;
+		assigned-clocks =
+			<&cru PLL_GPLL>, <&cru ARMCLK>,
+			<&cru PLL_CPLL>, <&cru ACLK_PERI>,
+			<&cru HCLK_PERI>, <&cru PCLK_PERI>,
+			<&cru ACLK_CPU>, <&cru HCLK_CPU>,
+			<&cru PCLK_CPU>;
+		assigned-clock-rates =
+			<594000000>, <816000000>,
+			<500000000>, <150000000>,
+			<150000000>, <75000000>,
+			<150000000>, <150000000>,
+			<75000000>;
 	};
 
 	thermal-zones {