| Message ID | 306395ff39de3d3d3c8f55e5da4de8def29ae8d1.1495210061.git-series.gregory.clement@free-electrons.com (mailing list archive) |
|---|---|
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On Fri, May 19, 2017 at 6:09 PM, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote: > Document the device tree binding for the gpio controllers found on the > Marvell Armada 7K and Armada 8K SoCs. > > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> This does not apply at all to the GPIO "devel" branch. And that is a fairly clean v4.12-rc2. Please rebase and resend the rest of the patches. Would be nice with a DT ACK but no controversial changes here. Yours, Linus Walleij
Hi Linus, On mar., mai 23 2017, Linus Walleij <linus.walleij@linaro.org> wrote: > On Fri, May 19, 2017 at 6:09 PM, Gregory CLEMENT > <gregory.clement@free-electrons.com> wrote: > >> Document the device tree binding for the gpio controllers found on the >> Marvell Armada 7K and Armada 8K SoCs. >> >> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> > > This does not apply at all to the GPIO "devel" branch. > And that is a fairly clean v4.12-rc2. > > Please rebase and resend the rest of the patches. Actually I was wrong with my assumption that there was no dependency. For the binding documentation there is dependecy accross the series I sent. This patch depends on "pinctrl: dt-bindings: add documentation for AP806 pin controllers" [1] and "pinctrl: dt-bindings: add documentation for CP110 pin controllers" [3] from the series "Add support for the pin controllers on the Marvell Armada 7K/8K". As you are maintainer of both gpio and pinctrl subsystem it will be easy to resolv. But these last patches depend also on "clk: mvebu: ap806: introduce a new binding" [3] in the clock series "Improve ap806 clk support on Marvell Armada 7K/8K" and on "clk: mvebu: cp110: introduce a new binding" [4] in the clock series "Improve cp110 clk support on Marvell Armada 7K/8K". So for these particular patches, either I rebase them on the v4.12-rc2 and there will be a small merge conflict during the merge window for v4.13, or we can ask a stable branch with only these few patches (I am adding the clock maintainer to this email). If we chose this last option I can split the clock patches to have patch modifying only the binding documentation. Gregory [1]: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/507399.html [2]: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/507398.html [3]: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/507393.html [4]: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/507384.html > Would be nice with a DT ACK but no controversial changes here. > > Yours, > Linus Walleij
On Tue, May 23, 2017 at 3:06 PM, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote: > On mar., mai 23 2017, Linus Walleij <linus.walleij@linaro.org> wrote: >> Please rebase and resend the rest of the patches. > > Actually I was wrong with my assumption that there was no dependency. > For the binding documentation there is dependecy accross the series I > sent. > > This patch depends on "pinctrl: dt-bindings: add documentation for AP806 > pin controllers" [1] and "pinctrl: dt-bindings: add documentation for > CP110 pin controllers" [3] from the series "Add support for the pin > controllers on the Marvell Armada 7K/8K". > > As you are maintainer of both gpio and pinctrl subsystem it will be easy > to resolv. Please send all patches in one big series in that case, so I can apply them all to a branch and merge that branch into both trees. > But these last patches depend also on "clk: mvebu: ap806: introduce a > new binding" [3] in the clock series "Improve ap806 clk support on > Marvell Armada 7K/8K" and on "clk: mvebu: cp110: introduce a new > binding" [4] in the clock series "Improve cp110 clk support on Marvell > Armada 7K/8K". That sounds messy. > So for these particular patches, either I rebase them on the v4.12-rc2 > and there will be a small merge conflict during the merge window for > v4.13, or we can ask a stable branch with only these few patches (I am > adding the clock maintainer to this email). > > If we chose this last option I can split the clock patches to have patch > modifying only the binding documentation. I think you can make a patch just modifying the binding documentation and then apply that patch to *both* trees, just make sure the patch is *final* and not applied in different versions in clk and pinctrl. I think cross-tree branches for documentation clashes is too much bureaucracy. Make sure your clock patch is finalized and preferably also applied to the clk tree then put it in the bottom of the patch set you send to me as well and I will proceed like above. Yours, Linus Walleij
On Mon, May 29, 2017 at 10:08:16AM +0200, Linus Walleij wrote: > On Tue, May 23, 2017 at 3:06 PM, Gregory CLEMENT > <gregory.clement@free-electrons.com> wrote: > > On mar., mai 23 2017, Linus Walleij <linus.walleij@linaro.org> wrote: > > >> Please rebase and resend the rest of the patches. > > > > Actually I was wrong with my assumption that there was no dependency. > > For the binding documentation there is dependecy accross the series I > > sent. > > > > This patch depends on "pinctrl: dt-bindings: add documentation for AP806 > > pin controllers" [1] and "pinctrl: dt-bindings: add documentation for > > CP110 pin controllers" [3] from the series "Add support for the pin > > controllers on the Marvell Armada 7K/8K". > > > > As you are maintainer of both gpio and pinctrl subsystem it will be easy > > to resolv. > > Please send all patches in one big series in that case, so I can apply > them all to a branch and merge that branch into both trees. > > > But these last patches depend also on "clk: mvebu: ap806: introduce a > > new binding" [3] in the clock series "Improve ap806 clk support on > > Marvell Armada 7K/8K" and on "clk: mvebu: cp110: introduce a new > > binding" [4] in the clock series "Improve cp110 clk support on Marvell > > Armada 7K/8K". > > That sounds messy. > > > So for these particular patches, either I rebase them on the v4.12-rc2 > > and there will be a small merge conflict during the merge window for > > v4.13, or we can ask a stable branch with only these few patches (I am > > adding the clock maintainer to this email). > > > > If we chose this last option I can split the clock patches to have patch > > modifying only the binding documentation. > > I think you can make a patch just modifying the binding documentation > and then apply that patch to *both* trees, just make sure the patch > is *final* and not applied in different versions in clk and pinctrl. I thought we try to avoid doing that. > I think cross-tree branches for documentation clashes is too much > bureaucracy. I can just take all the doc patches separately. Or you can take the clock one too. > Make sure your clock patch is finalized and preferably also applied > to the clk tree then put it in the bottom of the patch set you send > to me as well and I will proceed like above. > > Yours, > Linus Walleij
On Fri, May 19, 2017 at 06:09:22PM +0200, Gregory CLEMENT wrote: > Document the device tree binding for the gpio controllers found on the > Marvell Armada 7K and Armada 8K SoCs. > > Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> > --- > Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 20 ++++++++++++++++++++ > Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt | 24 +++++++++++++++++++++++- > Documentation/devicetree/bindings/gpio/gpio-mvebu.txt | 24 +++++++++++++++++------- > 3 files changed, 60 insertions(+), 8 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt > index 4228d158fb31..0b887440e08a 100644 > --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt > +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt > @@ -64,6 +64,17 @@ mpp17 17 gpio > mpp18 18 gpio > mpp19 19 gpio, uart0(rxd), sdio(pw_off) > > +GPIO: > +----- > +For common binding part and usage, refer to > +Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. > + > +Required properties: > + > +- compatible: "marvell,armada-8k-gpio" > + > +- offset: offset address inside the syscon block > + > Example: > ap_syscon: system-controller@6f4000 { > compatible = "syscon", "simple-mfd"; > @@ -77,4 +88,13 @@ ap_syscon: system-controller@6f4000 { > ap_pinctrl: pinctrl { > compatible = "marvell,ap806-pinctrl"; > }; > + > + ap_gpio: gpio { > + compatible = "marvell,armada-8k-gpio"; > + offset = <0x1040>; > + ngpios = <19>; > + gpio-controller; > + #gpio-cells = <2>; > + gpio-ranges = <&ap_pinctrl 0 0 19>; > + }; > }; > diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt > index 733beac7724e..655c114ef584 100644 > --- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt > +++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt > @@ -149,6 +149,18 @@ mpp60 60 gpio, mss_gpio6, ptp(pulse), tdm(dtx), au(i2smclk), spi0(csn1), uart0(r > mpp61 61 gpio, mss_gpio5, ptp(clk), tdm(pclk), au(i2sextclk), spi0(csn2), uart0(txd), uart2(txd), sata1(present_act), ge(mdio), sdio(d3) > mpp62 62 gpio, mss_gpio4, synce1(clk), ptp(pclk_out), sata1(present_act), spi0(csn3), uart0(rxd), uart2(rxd), sata0(present_act), ge(mdc) > > +GPIO: > +----- > + > +For common binding part and usage, refer to > +Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. > + > +Required properties: > + > +- compatible: "marvell,armada-8k-gpio" > + > +- offset: offset address inside the syscon block > + > Example: > > cpm_syscon0: system-controller@440000 { > @@ -163,5 +175,15 @@ cpm_syscon0: system-controller@440000 { > cpm_pinctrl: pinctrl { > compatible = "marvell,armada-8k-cpm-pinctrl"; > }; > -}; > > + cpm_gpio1: gpio@100 { > + compatible = "marvell,armada-8k-gpio"; > + offset = <0x100>; > + ngpios = <32>; > + gpio-controller; > + #gpio-cells = <2>; > + gpio-ranges = <&cpm_pinctrl 0 0 32>; > + status = "disabled"; > + }; > + > +}; > diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt > index 42c3bb2d53e8..2c5304ff467c 100644 > --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt > +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt > @@ -2,17 +2,27 @@ > > Required properties: > > -- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio" > - or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for > - Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada > - 370. "marvell,mv78200-gpio" should be used for the Discovery > - MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP > - SoCs (MV78230, MV78260, MV78460). > +- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio", > + "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio". > + > + "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove, > + Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio" > + should be used for the Discovery MV78200. > + > + "marvel,armadaxp-gpio" should be used for all Armada XP SoCs > + (MV78230, MV78260, MV78460). > + > + "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K > + SoCs (either from AP or CP), see > + Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt > + and > + Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt > + for specific details about the offset property. > > - reg: Address and length of the register set for the device. Only one > entry is expected, except for the "marvell,armadaxp-gpio" variant > for which two entries are expected: one for the general registers, > - one for the per-cpu registers. > + one for the per-cpu registers. Not used for marvell,armada-8k-gpio. Why can't use you use reg instead of offset? Rob
Hi Rob, On mer., mai 31 2017, Rob Herring <robh@kernel.org> wrote: > On Mon, May 29, 2017 at 10:08:16AM +0200, Linus Walleij wrote: >> On Tue, May 23, 2017 at 3:06 PM, Gregory CLEMENT >> <gregory.clement@free-electrons.com> wrote: >> > On mar., mai 23 2017, Linus Walleij <linus.walleij@linaro.org> wrote: >> >> >> Please rebase and resend the rest of the patches. >> > >> > Actually I was wrong with my assumption that there was no dependency. >> > For the binding documentation there is dependecy accross the series I >> > sent. >> > >> > This patch depends on "pinctrl: dt-bindings: add documentation for AP806 >> > pin controllers" [1] and "pinctrl: dt-bindings: add documentation for >> > CP110 pin controllers" [3] from the series "Add support for the pin >> > controllers on the Marvell Armada 7K/8K". >> > >> > As you are maintainer of both gpio and pinctrl subsystem it will be easy >> > to resolv. >> >> Please send all patches in one big series in that case, so I can apply >> them all to a branch and merge that branch into both trees. >> >> > But these last patches depend also on "clk: mvebu: ap806: introduce a >> > new binding" [3] in the clock series "Improve ap806 clk support on >> > Marvell Armada 7K/8K" and on "clk: mvebu: cp110: introduce a new >> > binding" [4] in the clock series "Improve cp110 clk support on Marvell >> > Armada 7K/8K". >> >> That sounds messy. >> >> > So for these particular patches, either I rebase them on the v4.12-rc2 >> > and there will be a small merge conflict during the merge window for >> > v4.13, or we can ask a stable branch with only these few patches (I am >> > adding the clock maintainer to this email). >> > >> > If we chose this last option I can split the clock patches to have patch >> > modifying only the binding documentation. >> >> I think you can make a patch just modifying the binding documentation >> and then apply that patch to *both* trees, just make sure the patch >> is *final* and not applied in different versions in clk and pinctrl. > > I thought we try to avoid doing that. > >> I think cross-tree branches for documentation clashes is too much >> bureaucracy. > > I can just take all the doc patches separately. Or you can take the > clock one too. If you can take all the doc patches I think we will managed to solve the issue in a efficient way. So I am going to send a new version of the clock series by splitting the "clk: mvebu: *: introduce a new binding" patches so you will be able to only pick the doc part. Thanks! Gregory > >> Make sure your clock patch is finalized and preferably also applied >> to the clk tree then put it in the bottom of the patch set you send >> to me as well and I will proceed like above. >> >> Yours, >> Linus Walleij
Hi Rob, On mer., mai 31 2017, Rob Herring <robh@kernel.org> wrote: >> >> Required properties: >> >> -- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio" >> - or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for >> - Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada >> - 370. "marvell,mv78200-gpio" should be used for the Discovery >> - MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP >> - SoCs (MV78230, MV78260, MV78460). >> +- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio", >> + "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio". >> + >> + "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove, >> + Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio" >> + should be used for the Discovery MV78200. >> + >> + "marvel,armadaxp-gpio" should be used for all Armada XP SoCs >> + (MV78230, MV78260, MV78460). >> + >> + "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K >> + SoCs (either from AP or CP), see >> + Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt >> + and >> + Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt >> + for specific details about the offset property. >> >> - reg: Address and length of the register set for the device. Only one >> entry is expected, except for the "marvell,armadaxp-gpio" variant >> for which two entries are expected: one for the general registers, >> - one for the per-cpu registers. >> + one for the per-cpu registers. Not used for marvell,armada-8k-gpio. > > Why can't use you use reg instead of offset? I looked for how the other syscon user did, and I found the offset usage. So I assumed it was the way to do it. But if you wan I can use a reg property. Gregory > > Rob
Quoting Rob Herring (2017-05-31 07:23:58) > On Mon, May 29, 2017 at 10:08:16AM +0200, Linus Walleij wrote: > > On Tue, May 23, 2017 at 3:06 PM, Gregory CLEMENT > > <gregory.clement@free-electrons.com> wrote: > > > On mar., mai 23 2017, Linus Walleij <linus.walleij@linaro.org> wrote: > > > > >> Please rebase and resend the rest of the patches. > > > > > > Actually I was wrong with my assumption that there was no dependency. > > > For the binding documentation there is dependecy accross the series I > > > sent. > > > > > > This patch depends on "pinctrl: dt-bindings: add documentation for AP806 > > > pin controllers" [1] and "pinctrl: dt-bindings: add documentation for > > > CP110 pin controllers" [3] from the series "Add support for the pin > > > controllers on the Marvell Armada 7K/8K". > > > > > > As you are maintainer of both gpio and pinctrl subsystem it will be easy > > > to resolv. > > > > Please send all patches in one big series in that case, so I can apply > > them all to a branch and merge that branch into both trees. > > > > > But these last patches depend also on "clk: mvebu: ap806: introduce a > > > new binding" [3] in the clock series "Improve ap806 clk support on > > > Marvell Armada 7K/8K" and on "clk: mvebu: cp110: introduce a new > > > binding" [4] in the clock series "Improve cp110 clk support on Marvell > > > Armada 7K/8K". > > > > That sounds messy. > > > > > So for these particular patches, either I rebase them on the v4.12-rc2 > > > and there will be a small merge conflict during the merge window for > > > v4.13, or we can ask a stable branch with only these few patches (I am > > > adding the clock maintainer to this email). > > > > > > If we chose this last option I can split the clock patches to have patch > > > modifying only the binding documentation. > > > > I think you can make a patch just modifying the binding documentation > > and then apply that patch to *both* trees, just make sure the patch > > is *final* and not applied in different versions in clk and pinctrl. > > I thought we try to avoid doing that. > > > I think cross-tree branches for documentation clashes is too much > > bureaucracy. > > I can just take all the doc patches separately. Or you can take the > clock one too. Stephen and I have started making a -dt branch for each new clk driver which. This stable branch has only the dt bindings/headers in it (no driver code). I'll make such a branch for ap806 this week and everyone can merge that in as a dep. Regards, Mike > > > Make sure your clock patch is finalized and preferably also applied > > to the clk tree then put it in the bottom of the patch set you send > > to me as well and I will proceed like above. > > > > Yours, > > Linus Walleij
Hi Michael, On mer., mai 31 2017, Michael Turquette <mturquette@baylibre.com> wrote: > Quoting Rob Herring (2017-05-31 07:23:58) >> On Mon, May 29, 2017 at 10:08:16AM +0200, Linus Walleij wrote: >> > On Tue, May 23, 2017 at 3:06 PM, Gregory CLEMENT >> > <gregory.clement@free-electrons.com> wrote: >> > > On mar., mai 23 2017, Linus Walleij <linus.walleij@linaro.org> wrote: >> > >> > >> Please rebase and resend the rest of the patches. >> > > >> > > Actually I was wrong with my assumption that there was no dependency. >> > > For the binding documentation there is dependecy accross the series I >> > > sent. >> > > >> > > This patch depends on "pinctrl: dt-bindings: add documentation for AP806 >> > > pin controllers" [1] and "pinctrl: dt-bindings: add documentation for >> > > CP110 pin controllers" [3] from the series "Add support for the pin >> > > controllers on the Marvell Armada 7K/8K". >> > > >> > > As you are maintainer of both gpio and pinctrl subsystem it will be easy >> > > to resolv. >> > >> > Please send all patches in one big series in that case, so I can apply >> > them all to a branch and merge that branch into both trees. >> > >> > > But these last patches depend also on "clk: mvebu: ap806: introduce a >> > > new binding" [3] in the clock series "Improve ap806 clk support on >> > > Marvell Armada 7K/8K" and on "clk: mvebu: cp110: introduce a new >> > > binding" [4] in the clock series "Improve cp110 clk support on Marvell >> > > Armada 7K/8K". >> > >> > That sounds messy. >> > >> > > So for these particular patches, either I rebase them on the v4.12-rc2 >> > > and there will be a small merge conflict during the merge window for >> > > v4.13, or we can ask a stable branch with only these few patches (I am >> > > adding the clock maintainer to this email). >> > > >> > > If we chose this last option I can split the clock patches to have patch >> > > modifying only the binding documentation. >> > >> > I think you can make a patch just modifying the binding documentation >> > and then apply that patch to *both* trees, just make sure the patch >> > is *final* and not applied in different versions in clk and pinctrl. >> >> I thought we try to avoid doing that. >> >> > I think cross-tree branches for documentation clashes is too much >> > bureaucracy. >> >> I can just take all the doc patches separately. Or you can take the >> clock one too. > > Stephen and I have started making a -dt branch for each new clk driver > which. This stable branch has only the dt bindings/headers in it (no > driver code). > > I'll make such a branch for ap806 this week and everyone can merge that > in as a dep. So please use the version 2 I've just submitted. I split each patch to allow you to have a dt binding only branch. See http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509832.html I did the same for the cp110: http://lists.infradead.org/pipermail/linux-arm-kernel/2017-May/509816.html Gregory > > Regards, > Mike > >> >> > Make sure your clock patch is finalized and preferably also applied >> > to the clk tree then put it in the bottom of the patch set you send >> > to me as well and I will proceed like above. >> > >> > Yours, >> > Linus Walleij
Hi Rob, On mer., mai 31 2017, Gregory CLEMENT <gregory.clement@free-electrons.com> wrote: > Hi Rob, > > On mer., mai 31 2017, Rob Herring <robh@kernel.org> wrote: >>> >>> Required properties: >>> >>> -- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio" >>> - or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for >>> - Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada >>> - 370. "marvell,mv78200-gpio" should be used for the Discovery >>> - MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP >>> - SoCs (MV78230, MV78260, MV78460). >>> +- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio", >>> + "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio". >>> + >>> + "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove, >>> + Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio" >>> + should be used for the Discovery MV78200. >>> + >>> + "marvel,armadaxp-gpio" should be used for all Armada XP SoCs >>> + (MV78230, MV78260, MV78460). >>> + >>> + "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K >>> + SoCs (either from AP or CP), see >>> + Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt >>> + and >>> + Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt >>> + for specific details about the offset property. >>> >>> - reg: Address and length of the register set for the device. Only one >>> entry is expected, except for the "marvell,armadaxp-gpio" variant >>> for which two entries are expected: one for the general registers, >>> - one for the per-cpu registers. >>> + one for the per-cpu registers. Not used for marvell,armada-8k-gpio. >> >> Why can't use you use reg instead of offset? > > I looked for how the other syscon user did, and I found the offset > usage. So I assumed it was the way to do it. But if you wan I can use a > reg property. I had a closer looked to the binding when syscon is used with several subnodes. And actually the reg usage is very uncommon, I only find it in drivers/regulator/pbias-regulator.c but for legacy. I am not sure that we have any benefit with this reg property: we won't use the length of the register and we need to add a range property in the parent node. An other way to pass this information is to have a different compatible string which will match the different offset available. In this case the reg property won't be used in a syscon node. However, while it makes sens for the difference between AP806 and CP110, it would be strange to have a different compatible string for gpio bank 1 and gpio bank 2. So, in the end I would prefer to use the offset. From my point of view it is better to not use the reg property for two different purposes: mmio address vs offset in a syscon. But if you think that from the point of view of the device tree compliance we have to use the reg property, of course I will change it. Thanks, Gregory > > Gregory > >> >> Rob > > -- > Gregory Clement, Free Electrons > Kernel, drivers, real-time and embedded Linux > development, consulting, training and support. > http://free-electrons.com > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt index 4228d158fb31..0b887440e08a 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -64,6 +64,17 @@ mpp17 17 gpio mpp18 18 gpio mpp19 19 gpio, uart0(rxd), sdio(pw_off) +GPIO: +----- +For common binding part and usage, refer to +Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. + +Required properties: + +- compatible: "marvell,armada-8k-gpio" + +- offset: offset address inside the syscon block + Example: ap_syscon: system-controller@6f4000 { compatible = "syscon", "simple-mfd"; @@ -77,4 +88,13 @@ ap_syscon: system-controller@6f4000 { ap_pinctrl: pinctrl { compatible = "marvell,ap806-pinctrl"; }; + + ap_gpio: gpio { + compatible = "marvell,armada-8k-gpio"; + offset = <0x1040>; + ngpios = <19>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ap_pinctrl 0 0 19>; + }; }; diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt index 733beac7724e..655c114ef584 100644 --- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt +++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt @@ -149,6 +149,18 @@ mpp60 60 gpio, mss_gpio6, ptp(pulse), tdm(dtx), au(i2smclk), spi0(csn1), uart0(r mpp61 61 gpio, mss_gpio5, ptp(clk), tdm(pclk), au(i2sextclk), spi0(csn2), uart0(txd), uart2(txd), sata1(present_act), ge(mdio), sdio(d3) mpp62 62 gpio, mss_gpio4, synce1(clk), ptp(pclk_out), sata1(present_act), spi0(csn3), uart0(rxd), uart2(rxd), sata0(present_act), ge(mdc) +GPIO: +----- + +For common binding part and usage, refer to +Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. + +Required properties: + +- compatible: "marvell,armada-8k-gpio" + +- offset: offset address inside the syscon block + Example: cpm_syscon0: system-controller@440000 { @@ -163,5 +175,15 @@ cpm_syscon0: system-controller@440000 { cpm_pinctrl: pinctrl { compatible = "marvell,armada-8k-cpm-pinctrl"; }; -}; + cpm_gpio1: gpio@100 { + compatible = "marvell,armada-8k-gpio"; + offset = <0x100>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cpm_pinctrl 0 0 32>; + status = "disabled"; + }; + +}; diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt index 42c3bb2d53e8..2c5304ff467c 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt @@ -2,17 +2,27 @@ Required properties: -- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio" - or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for - Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada - 370. "marvell,mv78200-gpio" should be used for the Discovery - MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP - SoCs (MV78230, MV78260, MV78460). +- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio", + "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio". + + "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove, + Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio" + should be used for the Discovery MV78200. + + "marvel,armadaxp-gpio" should be used for all Armada XP SoCs + (MV78230, MV78260, MV78460). + + "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K + SoCs (either from AP or CP), see + Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt + and + Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt + for specific details about the offset property. - reg: Address and length of the register set for the device. Only one entry is expected, except for the "marvell,armadaxp-gpio" variant for which two entries are expected: one for the general registers, - one for the per-cpu registers. + one for the per-cpu registers. Not used for marvell,armada-8k-gpio. - interrupts: The list of interrupts that are used for all the pins managed by this GPIO bank. There can be more than one interrupt
Document the device tree binding for the gpio controllers found on the Marvell Armada 7K and Armada 8K SoCs. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> --- Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 20 ++++++++++++++++++++ Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt | 24 +++++++++++++++++++++++- Documentation/devicetree/bindings/gpio/gpio-mvebu.txt | 24 +++++++++++++++++------- 3 files changed, 60 insertions(+), 8 deletions(-)