diff mbox

ARM: dts: am43xx-clocks: Add support for CLKOUT2

Message ID 20170524084341.16698-1-peter.ujfalusi@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Peter Ujfalusi May 24, 2017, 8:43 a.m. UTC
Add the needed clock nodes for the CLKOUT2 to be usable by boards.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/am43xx-clocks.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

Comments

Tony Lindgren May 26, 2017, 3:52 p.m. UTC | #1
* Peter Ujfalusi <peter.ujfalusi@ti.com> [170524 01:47]:
> Add the needed clock nodes for the CLKOUT2 to be usable by boards.

Tero, care to ack?

Regards,

Tony
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Tero Kristo May 29, 2017, 8:27 a.m. UTC | #2
On 26/05/17 18:52, Tony Lindgren wrote:
> * Peter Ujfalusi <peter.ujfalusi@ti.com> [170524 01:47]:
>> Add the needed clock nodes for the CLKOUT2 to be usable by boards.
>
> Tero, care to ack?

I can't test the actual clock itself but the patch looks fine based on 
TRM, and doesn't seem to cause any issues either so:

Acked-by: Tero Kristo <t-kristo@ti.com>


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Tony Lindgren May 31, 2017, 5:20 p.m. UTC | #3
* Tero Kristo <t-kristo@ti.com> [170529 01:31]:
> On 26/05/17 18:52, Tony Lindgren wrote:
> > * Peter Ujfalusi <peter.ujfalusi@ti.com> [170524 01:47]:
> > > Add the needed clock nodes for the CLKOUT2 to be usable by boards.
> > 
> > Tero, care to ack?
> 
> I can't test the actual clock itself but the patch looks fine based on TRM,
> and doesn't seem to cause any issues either so:
> 
> Acked-by: Tero Kristo <t-kristo@ti.com>

OK thanks applying into omap-for-v4.13/dt.

Tony
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index d1d73b725f47..430be5829f8f 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -833,4 +833,40 @@ 
 		ti,bit-shift = <23>;
 		reg = <0x4100>;
 	};
+
+	clkout2_src_mux_ck: clkout2_src_mux_ck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
+			 <&dpll_per_m2_ck>, <&dpll_disp_m2_ck>,
+			 <&dpll_mpu_m2_ck>, <&dpll_extdev_ck>;
+		reg = <0x4108>;
+	};
+
+	clkout2_pre_div_ck: clkout2_pre_div_ck {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clocks = <&clkout2_src_mux_ck>;
+		ti,bit-shift = <4>;
+		ti,max-div = <8>;
+		reg = <0x4108>;
+	};
+
+	clkout2_post_div_ck: clkout2_post_div_ck {
+		#clock-cells = <0>;
+		compatible = "ti,divider-clock";
+		clocks = <&clkout2_pre_div_ck>;
+		ti,bit-shift = <8>;
+		ti,max-div = <32>;
+		ti,index-power-of-two;
+		reg = <0x4108>;
+	};
+
+	clkout2_ck: clkout2_ck {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clocks = <&clkout2_post_div_ck>;
+		ti,bit-shift = <16>;
+		reg = <0x4108>;
+	};
 };