Message ID | 1b0dac2d2236f86c87b066a95f33bd80a5ad5c6b.1496771145.git.leonard.crestez@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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pengutronix.de; dkim=none (message not signed) header.d=none; pengutronix.de; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11OLC008.mail.protection.outlook.com (10.1.14.255) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1101.12 via Frontend Transport; Tue, 6 Jun 2017 17:50:54 +0000 Received: from fsr-ub1664-115.ea.freescale.net (fsr-ub1664-115.ea.freescale.net [10.171.73.164]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v56HomQr022481; Tue, 6 Jun 2017 10:50:51 -0700 From: Leonard Crestez <leonard.crestez@nxp.com> To: Shawn Guo <shawnguo@kernel.org> Subject: [PATCH v2 1/2] ARM: imx: Add MXC_CPU_IMX6ULL and cpu_is_imx6ull Date: Tue, 6 Jun 2017 20:50:42 +0300 Message-ID: <1b0dac2d2236f86c87b066a95f33bd80a5ad5c6b.1496771145.git.leonard.crestez@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <cover.1496771145.git.leonard.crestez@nxp.com> References: <cover.1496771145.git.leonard.crestez@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131412450545834605; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP |
On Tue, Jun 6, 2017 at 2:50 PM, Leonard Crestez <leonard.crestez@nxp.com> wrote: > Support for imx6ull is already present but it's based on > of_machine_is_compatible("fsl,imx6ull") checks. Add it to the MXC_CPU_* > enumeration as well. > > This also fixes /sys/devices/soc0/soc_id reading "Unknown". > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index b3347d3..94906ed 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -131,6 +131,9 @@ struct device * __init imx_soc_device_init(void) case MXC_CPU_IMX6UL: soc_id = "i.MX6UL"; break; + case MXC_CPU_IMX6ULL: + soc_id = "i.MX6ULL"; + break; case MXC_CPU_IMX7D: soc_id = "i.MX7D"; break; diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index 34f2ff6..e00d626 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -39,6 +39,7 @@ #define MXC_CPU_IMX6SX 0x62 #define MXC_CPU_IMX6Q 0x63 #define MXC_CPU_IMX6UL 0x64 +#define MXC_CPU_IMX6ULL 0x65 #define MXC_CPU_IMX7D 0x72 #define IMX_DDR_TYPE_LPDDR2 1 @@ -73,6 +74,11 @@ static inline bool cpu_is_imx6ul(void) return __mxc_cpu_type == MXC_CPU_IMX6UL; } +static inline bool cpu_is_imx6ull(void) +{ + return __mxc_cpu_type == MXC_CPU_IMX6ULL; +} + static inline bool cpu_is_imx6q(void) { return __mxc_cpu_type == MXC_CPU_IMX6Q;
Support for imx6ull is already present but it's based on of_machine_is_compatible("fsl,imx6ull") checks. Add it to the MXC_CPU_* enumeration as well. This also fixes /sys/devices/soc0/soc_id reading "Unknown". Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> --- arch/arm/mach-imx/cpu.c | 3 +++ arch/arm/mach-imx/mxc.h | 6 ++++++ 2 files changed, 9 insertions(+)