| Message ID | 82d6bf37-96b9-cd9d-134b-f01638fa2b1b@sigmadesigns.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 13/06/17 15:01, Marc Gonzalez wrote: > The MSI controller in Tango supports 256 message-signaled interrupts, > and a single doorbell address. > > Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> > --- > Changes from v5 to v6 > o Rename 'used' bitmap to 'used_msi' > o Rename 'lock' spinlock to 'used_msi_lock' > o Take lock in interrupt handler > o Remove irq_dom in error path > --- > drivers/pci/host/pcie-tango.c | 225 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 225 insertions(+) > > diff --git a/drivers/pci/host/pcie-tango.c b/drivers/pci/host/pcie-tango.c > index 67aaadcc1c5e..b06446b23bc8 100644 > --- a/drivers/pci/host/pcie-tango.c > +++ b/drivers/pci/host/pcie-tango.c > @@ -1,16 +1,228 @@ > +#include <linux/irqchip/chained_irq.h> > +#include <linux/irqdomain.h> > #include <linux/pci-ecam.h> > #include <linux/delay.h> > +#include <linux/msi.h> > #include <linux/of.h> > > #define MSI_MAX 256 > > #define SMP8759_MUX 0x48 > #define SMP8759_TEST_OUT 0x74 > +#define SMP8759_STATUS 0x80 > +#define SMP8759_ENABLE 0xa0 > +#define SMP8759_DOORBELL 0xa002e07c > > struct tango_pcie { > + DECLARE_BITMAP(used_msi, MSI_MAX); > + spinlock_t used_msi_lock; > void __iomem *mux; > + void __iomem *msi_status; > + void __iomem *msi_enable; > + phys_addr_t msi_doorbell; > + struct irq_domain *irq_dom; > + struct irq_domain *msi_dom; > + int irq; > }; > > +/*** MSI CONTROLLER SUPPORT ***/ > + > +static void tango_msi_isr(struct irq_desc *desc) > +{ > + struct irq_chip *chip = irq_desc_get_chip(desc); > + struct tango_pcie *pcie = irq_desc_get_handler_data(desc); > + unsigned long flags, status, base, virq, idx, pos = 0; > + > + chained_irq_enter(chip, desc); > + spin_lock_irqsave(&pcie->used_msi_lock, flags); You're already in interrupt context, so there is no need to disable interrupts any further. spin_lock() should do the trick Thanks, M.
On 13/06/2017 16:22, Marc Zyngier wrote: > On 13/06/17 15:01, Marc Gonzalez wrote: >> The MSI controller in Tango supports 256 message-signaled interrupts, >> and a single doorbell address. >> >> Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> >> --- >> Changes from v5 to v6 >> o Rename 'used' bitmap to 'used_msi' >> o Rename 'lock' spinlock to 'used_msi_lock' >> o Take lock in interrupt handler >> o Remove irq_dom in error path >> --- >> drivers/pci/host/pcie-tango.c | 225 ++++++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 225 insertions(+) >> >> diff --git a/drivers/pci/host/pcie-tango.c b/drivers/pci/host/pcie-tango.c >> index 67aaadcc1c5e..b06446b23bc8 100644 >> --- a/drivers/pci/host/pcie-tango.c >> +++ b/drivers/pci/host/pcie-tango.c >> @@ -1,16 +1,228 @@ >> +#include <linux/irqchip/chained_irq.h> >> +#include <linux/irqdomain.h> >> #include <linux/pci-ecam.h> >> #include <linux/delay.h> >> +#include <linux/msi.h> >> #include <linux/of.h> >> >> #define MSI_MAX 256 >> >> #define SMP8759_MUX 0x48 >> #define SMP8759_TEST_OUT 0x74 >> +#define SMP8759_STATUS 0x80 >> +#define SMP8759_ENABLE 0xa0 >> +#define SMP8759_DOORBELL 0xa002e07c >> >> struct tango_pcie { >> + DECLARE_BITMAP(used_msi, MSI_MAX); >> + spinlock_t used_msi_lock; >> void __iomem *mux; >> + void __iomem *msi_status; >> + void __iomem *msi_enable; >> + phys_addr_t msi_doorbell; >> + struct irq_domain *irq_dom; >> + struct irq_domain *msi_dom; >> + int irq; >> }; >> >> +/*** MSI CONTROLLER SUPPORT ***/ >> + >> +static void tango_msi_isr(struct irq_desc *desc) >> +{ >> + struct irq_chip *chip = irq_desc_get_chip(desc); >> + struct tango_pcie *pcie = irq_desc_get_handler_data(desc); >> + unsigned long flags, status, base, virq, idx, pos = 0; >> + >> + chained_irq_enter(chip, desc); >> + spin_lock_irqsave(&pcie->used_msi_lock, flags); > > You're already in interrupt context, so there is no need to disable > interrupts any further. spin_lock() should do the trick Thanks for the hint. I am confused, because Documentation/locking/spinlocks.txt states: > If you have a case where you have to protect a data structure across > several CPU's and you want to use spinlocks you can potentially use > cheaper versions of the spinlocks. IFF you know that the spinlocks are > never used in interrupt handlers, you can use the non-irq versions: > > spin_lock(&lock); > ... > spin_unlock(&lock); > > (and the equivalent read-write versions too, of course). The spinlock will > guarantee the same kind of exclusive access, and it will be much faster. > This is useful if you know that the data in question is only ever > manipulated from a "process context", ie no interrupts involved. > > The reasons you mustn't use these versions if you have interrupts that > play with the spinlock is that you can get deadlocks: > > spin_lock(&lock); > ... > <- interrupt comes in: > spin_lock(&lock); > > where an interrupt tries to lock an already locked variable. This is ok if > the other interrupt happens on another CPU, but it is _not_ ok if the > interrupt happens on the same CPU that already holds the lock, because the > lock will obviously never be released (because the interrupt is waiting > for the lock, and the lock-holder is interrupted by the interrupt and will > not continue until the interrupt has been processed). > > (This is also the reason why the irq-versions of the spinlocks only need > to disable the _local_ interrupts - it's ok to use spinlocks in interrupts > on other CPU's, because an interrupt on another CPU doesn't interrupt the > CPU that holds the lock, so the lock-holder can continue and eventually > releases the lock). Isn't this saying that it is not safe to call spin_lock() from the interrupt handler? (Sorry if I misunderstood.) Regards.
On 13/06/17 15:47, Marc Gonzalez wrote: > On 13/06/2017 16:22, Marc Zyngier wrote: >> On 13/06/17 15:01, Marc Gonzalez wrote: >>> The MSI controller in Tango supports 256 message-signaled interrupts, >>> and a single doorbell address. >>> >>> Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> >>> --- >>> Changes from v5 to v6 >>> o Rename 'used' bitmap to 'used_msi' >>> o Rename 'lock' spinlock to 'used_msi_lock' >>> o Take lock in interrupt handler >>> o Remove irq_dom in error path >>> --- >>> drivers/pci/host/pcie-tango.c | 225 ++++++++++++++++++++++++++++++++++++++++++ >>> 1 file changed, 225 insertions(+) >>> >>> diff --git a/drivers/pci/host/pcie-tango.c b/drivers/pci/host/pcie-tango.c >>> index 67aaadcc1c5e..b06446b23bc8 100644 >>> --- a/drivers/pci/host/pcie-tango.c >>> +++ b/drivers/pci/host/pcie-tango.c >>> @@ -1,16 +1,228 @@ >>> +#include <linux/irqchip/chained_irq.h> >>> +#include <linux/irqdomain.h> >>> #include <linux/pci-ecam.h> >>> #include <linux/delay.h> >>> +#include <linux/msi.h> >>> #include <linux/of.h> >>> >>> #define MSI_MAX 256 >>> >>> #define SMP8759_MUX 0x48 >>> #define SMP8759_TEST_OUT 0x74 >>> +#define SMP8759_STATUS 0x80 >>> +#define SMP8759_ENABLE 0xa0 >>> +#define SMP8759_DOORBELL 0xa002e07c >>> >>> struct tango_pcie { >>> + DECLARE_BITMAP(used_msi, MSI_MAX); >>> + spinlock_t used_msi_lock; >>> void __iomem *mux; >>> + void __iomem *msi_status; >>> + void __iomem *msi_enable; >>> + phys_addr_t msi_doorbell; >>> + struct irq_domain *irq_dom; >>> + struct irq_domain *msi_dom; >>> + int irq; >>> }; >>> >>> +/*** MSI CONTROLLER SUPPORT ***/ >>> + >>> +static void tango_msi_isr(struct irq_desc *desc) >>> +{ >>> + struct irq_chip *chip = irq_desc_get_chip(desc); >>> + struct tango_pcie *pcie = irq_desc_get_handler_data(desc); >>> + unsigned long flags, status, base, virq, idx, pos = 0; >>> + >>> + chained_irq_enter(chip, desc); >>> + spin_lock_irqsave(&pcie->used_msi_lock, flags); >> >> You're already in interrupt context, so there is no need to disable >> interrupts any further. spin_lock() should do the trick > > Thanks for the hint. > > I am confused, because Documentation/locking/spinlocks.txt states: > >> If you have a case where you have to protect a data structure across >> several CPU's and you want to use spinlocks you can potentially use >> cheaper versions of the spinlocks. IFF you know that the spinlocks are >> never used in interrupt handlers, you can use the non-irq versions: >> >> spin_lock(&lock); >> ... >> spin_unlock(&lock); >> >> (and the equivalent read-write versions too, of course). The spinlock will >> guarantee the same kind of exclusive access, and it will be much faster. >> This is useful if you know that the data in question is only ever >> manipulated from a "process context", ie no interrupts involved. >> >> The reasons you mustn't use these versions if you have interrupts that >> play with the spinlock is that you can get deadlocks: >> >> spin_lock(&lock); >> ... >> <- interrupt comes in: >> spin_lock(&lock); >> >> where an interrupt tries to lock an already locked variable. This is ok if >> the other interrupt happens on another CPU, but it is _not_ ok if the >> interrupt happens on the same CPU that already holds the lock, because the >> lock will obviously never be released (because the interrupt is waiting >> for the lock, and the lock-holder is interrupted by the interrupt and will >> not continue until the interrupt has been processed). >> >> (This is also the reason why the irq-versions of the spinlocks only need >> to disable the _local_ interrupts - it's ok to use spinlocks in interrupts >> on other CPU's, because an interrupt on another CPU doesn't interrupt the >> CPU that holds the lock, so the lock-holder can continue and eventually >> releases the lock). > > Isn't this saying that it is not safe to call spin_lock() from > the interrupt handler? (Sorry if I misunderstood.) It is saying exactly the opposite. If you take a spinlock and can be interrupted by an interrupt that takes the same spinlock, then you must use the irq-safe version *outside of the interrupt handler*. That's because Linux interrupts are not preemptible (well, in general -- it is different with RT, but let's not get there). If you're guaranteed that no interrupt handler will take this spinlock, then you don't have to use the irq-safe version. M.
diff --git a/drivers/pci/host/pcie-tango.c b/drivers/pci/host/pcie-tango.c index 67aaadcc1c5e..b06446b23bc8 100644 --- a/drivers/pci/host/pcie-tango.c +++ b/drivers/pci/host/pcie-tango.c @@ -1,16 +1,228 @@ +#include <linux/irqchip/chained_irq.h> +#include <linux/irqdomain.h> #include <linux/pci-ecam.h> #include <linux/delay.h> +#include <linux/msi.h> #include <linux/of.h> #define MSI_MAX 256 #define SMP8759_MUX 0x48 #define SMP8759_TEST_OUT 0x74 +#define SMP8759_STATUS 0x80 +#define SMP8759_ENABLE 0xa0 +#define SMP8759_DOORBELL 0xa002e07c struct tango_pcie { + DECLARE_BITMAP(used_msi, MSI_MAX); + spinlock_t used_msi_lock; void __iomem *mux; + void __iomem *msi_status; + void __iomem *msi_enable; + phys_addr_t msi_doorbell; + struct irq_domain *irq_dom; + struct irq_domain *msi_dom; + int irq; }; +/*** MSI CONTROLLER SUPPORT ***/ + +static void tango_msi_isr(struct irq_desc *desc) +{ + struct irq_chip *chip = irq_desc_get_chip(desc); + struct tango_pcie *pcie = irq_desc_get_handler_data(desc); + unsigned long flags, status, base, virq, idx, pos = 0; + + chained_irq_enter(chip, desc); + spin_lock_irqsave(&pcie->used_msi_lock, flags); + + while ((pos = find_next_bit(pcie->used_msi, MSI_MAX, pos)) < MSI_MAX) { + base = round_down(pos, 32); + status = readl_relaxed(pcie->msi_status + base / 8); + for_each_set_bit(idx, &status, 32) { + virq = irq_find_mapping(pcie->irq_dom, base + idx); + generic_handle_irq(virq); + } + pos = base + 32; + } + + spin_unlock_irqrestore(&pcie->used_msi_lock, flags); + chained_irq_exit(chip, desc); +} + +static void tango_ack(struct irq_data *d) +{ + struct tango_pcie *pcie = d->chip_data; + u32 offset = (d->hwirq / 32) * 4; + u32 bit = BIT(d->hwirq % 32); + + writel_relaxed(bit, pcie->msi_status + offset); +} + +static void update_msi_enable(struct irq_data *d, bool unmask) +{ + unsigned long flags; + struct tango_pcie *pcie = d->chip_data; + u32 offset = (d->hwirq / 32) * 4; + u32 bit = BIT(d->hwirq % 32); + u32 val; + + spin_lock_irqsave(&pcie->used_msi_lock, flags); + val = readl_relaxed(pcie->msi_enable + offset); + val = unmask ? val | bit : val & ~bit; + writel_relaxed(val, pcie->msi_enable + offset); + spin_unlock_irqrestore(&pcie->used_msi_lock, flags); +} + +static void tango_mask(struct irq_data *d) +{ + update_msi_enable(d, false); +} + +static void tango_unmask(struct irq_data *d) +{ + update_msi_enable(d, true); +} + +static int tango_set_affinity(struct irq_data *d, + const struct cpumask *mask, bool force) +{ + return -EINVAL; +} + +static void tango_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) +{ + struct tango_pcie *pcie = d->chip_data; + msg->address_lo = lower_32_bits(pcie->msi_doorbell); + msg->address_hi = upper_32_bits(pcie->msi_doorbell); + msg->data = d->hwirq; +} + +static struct irq_chip tango_chip = { + .irq_ack = tango_ack, + .irq_mask = tango_mask, + .irq_unmask = tango_unmask, + .irq_set_affinity = tango_set_affinity, + .irq_compose_msi_msg = tango_compose_msi_msg, +}; + +static void msi_ack(struct irq_data *d) +{ + irq_chip_ack_parent(d); +} + +static void msi_mask(struct irq_data *d) +{ + pci_msi_mask_irq(d); + irq_chip_mask_parent(d); +} + +static void msi_unmask(struct irq_data *d) +{ + pci_msi_unmask_irq(d); + irq_chip_unmask_parent(d); +} + +static struct irq_chip msi_chip = { + .name = "MSI", + .irq_ack = msi_ack, + .irq_mask = msi_mask, + .irq_unmask = msi_unmask, +}; + +static struct msi_domain_info msi_dom_info = { + .flags = MSI_FLAG_PCI_MSIX + | MSI_FLAG_USE_DEF_DOM_OPS + | MSI_FLAG_USE_DEF_CHIP_OPS, + .chip = &msi_chip, +}; + +static int tango_irq_domain_alloc(struct irq_domain *dom, + unsigned int virq, unsigned int nr_irqs, void *args) +{ + unsigned long flags; + int pos, err = -ENOSPC; + struct tango_pcie *pcie = dom->host_data; + + spin_lock_irqsave(&pcie->used_msi_lock, flags); + pos = find_first_zero_bit(pcie->used_msi, MSI_MAX); + if (pos < MSI_MAX) { + err = 0; + __set_bit(pos, pcie->used_msi); + irq_domain_set_info(dom, virq, pos, + &tango_chip, pcie, handle_edge_irq, NULL, NULL); + } + spin_unlock_irqrestore(&pcie->used_msi_lock, flags); + + return err; +} + +static void tango_irq_domain_free(struct irq_domain *dom, + unsigned int virq, unsigned int nr_irqs) +{ + unsigned long flags; + struct irq_data *d = irq_domain_get_irq_data(dom, virq); + struct tango_pcie *pcie = d->chip_data; + + spin_lock_irqsave(&pcie->used_msi_lock, flags); + __clear_bit(d->hwirq, pcie->used_msi); + spin_unlock_irqrestore(&pcie->used_msi_lock, flags); +} + +static const struct irq_domain_ops irq_dom_ops = { + .alloc = tango_irq_domain_alloc, + .free = tango_irq_domain_free, +}; + +static int tango_msi_remove(struct platform_device *pdev) +{ + struct tango_pcie *pcie = platform_get_drvdata(pdev); + + irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); + irq_domain_remove(pcie->msi_dom); + irq_domain_remove(pcie->irq_dom); + + return 0; +} + +static int tango_msi_probe(struct platform_device *pdev, struct tango_pcie *pcie) +{ + int i, virq; + struct irq_domain *msi_dom, *irq_dom; + struct fwnode_handle *fwnode = of_node_to_fwnode(pdev->dev.of_node); + + spin_lock_init(&pcie->used_msi_lock); + for (i = 0; i < MSI_MAX / 32; ++i) + writel_relaxed(0, pcie->msi_enable + i * 4); + + virq = platform_get_irq(pdev, 1); + if (virq <= 0) { + pr_err("Failed to map IRQ\n"); + return -ENXIO; + } + + irq_dom = irq_domain_create_linear(fwnode, MSI_MAX, &irq_dom_ops, pcie); + if (!irq_dom) { + pr_err("Failed to create IRQ domain\n"); + return -ENOMEM; + } + + msi_dom = pci_msi_create_irq_domain(fwnode, &msi_dom_info, irq_dom); + if (!msi_dom) { + pr_err("Failed to create MSI domain\n"); + irq_domain_remove(irq_dom); + return -ENOMEM; + } + + pcie->irq_dom = irq_dom; + pcie->msi_dom = msi_dom; + pcie->irq = virq; + + irq_set_chained_handler_and_data(virq, tango_msi_isr, pcie); + + return 0; +} + /*** HOST BRIDGE SUPPORT ***/ static int smp8759_config_read(struct pci_bus *bus, @@ -88,6 +300,9 @@ static int tango_check_pcie_link(void __iomem *test_out) static int smp8759_init(struct tango_pcie *pcie, void __iomem *base) { pcie->mux = base + SMP8759_MUX; + pcie->msi_status = base + SMP8759_STATUS; + pcie->msi_enable = base + SMP8759_ENABLE; + pcie->msi_doorbell = SMP8759_DOORBELL; return tango_check_pcie_link(base + SMP8759_TEST_OUT); } @@ -121,11 +336,21 @@ static int tango_pcie_probe(struct platform_device *pdev) if (ret) return ret; + ret = tango_msi_probe(pdev, pcie); + if (ret) + return ret; + return pci_host_common_probe(pdev, &smp8759_ecam_ops); } +static int tango_pcie_remove(struct platform_device *pdev) +{ + return tango_msi_remove(pdev); +} + static struct platform_driver tango_pcie_driver = { .probe = tango_pcie_probe, + .remove = tango_pcie_remove, .driver = { .name = KBUILD_MODNAME, .of_match_table = tango_pcie_ids,
The MSI controller in Tango supports 256 message-signaled interrupts, and a single doorbell address. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> --- Changes from v5 to v6 o Rename 'used' bitmap to 'used_msi' o Rename 'lock' spinlock to 'used_msi_lock' o Take lock in interrupt handler o Remove irq_dom in error path --- drivers/pci/host/pcie-tango.c | 225 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 225 insertions(+)