Message ID | 1497974944-27050-7-git-send-email-edgar.iglesias@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 06/20/2017 09:09 AM, Edgar E. Iglesias wrote: > + int width = imm_w - imm_s + 1; > + > + if (width == 0 || imm_w <= imm_s) { The width == 0 check is redundant; the imm_w <= imm_s check is wrong. It should be <. If imm_w >= imm_s, as per the proper check, then width must be >= 1. r~
On Tue, Jun 20, 2017 at 10:48:22AM -0700, Richard Henderson wrote: > On 06/20/2017 09:09 AM, Edgar E. Iglesias wrote: > >+ int width = imm_w - imm_s + 1; > >+ > >+ if (width == 0 || imm_w <= imm_s) { > > The width == 0 check is redundant; the imm_w <= imm_s check is wrong. It > should be <. > > If imm_w >= imm_s, as per the proper check, then width must be >= 1. Right, will fix for v2. Thanks! Edgar
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 4a8ab22..743b66f 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -661,7 +661,7 @@ static void dec_barrel(DisasContext *dc) { TCGv t0; unsigned int imm_w, imm_s; - bool s, t, e = false; + bool s, t, e = false, i = false; if ((dc->tb_flags & MSR_EE_FLAG) && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) @@ -673,6 +673,7 @@ static void dec_barrel(DisasContext *dc) if (dc->type_b) { /* Insert and extract are only available in immediate mode. */ + i = extract32(dc->imm, 15, 1); e = extract32(dc->imm, 14, 1); } s = extract32(dc->imm, 10, 1); @@ -686,6 +687,17 @@ static void dec_barrel(DisasContext *dc) if (e) { tcg_gen_extract_i32(cpu_R[dc->rd], cpu_R[dc->ra], imm_s, imm_w); + } else if (i) { + int width = imm_w - imm_s + 1; + + if (width == 0 || imm_w <= imm_s) { + /* These inputs have an undefined behavior. */ + qemu_log_mask(LOG_GUEST_ERROR, "bsifi: Bad input w=%d s=%d\n", + imm_w, imm_s); + } else { + tcg_gen_deposit_i32(cpu_R[dc->rd], cpu_R[dc->rd], cpu_R[dc->ra], + imm_s, width); + } } else { t0 = tcg_temp_new();