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[19/21] drm/etnaviv: need to disable clock gating when doing profiling

Message ID 20170609102618.3195-10-christian.gmeiner@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Christian Gmeiner June 9, 2017, 10:26 a.m. UTC 
As done by Vivante kernel driver.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Lucas Stach June 26, 2017, 1:45 p.m. UTC | #1 
Am Freitag, den 09.06.2017, 12:26 +0200 schrieb Christian Gmeiner:
> As done by Vivante kernel driver.
> 
> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> index 2e9f031..1e23472 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> @@ -1329,6 +1329,13 @@ static void sync_point_perfmon_sample(struct
> etnaviv_gpu *gpu,
>  static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,
>  	struct etnaviv_event *event)
>  {
> +	u32 val;
> +
> +	/* disable clock gating */
> +	val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
> +	val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
> +	gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
> +
>  	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE);
>  }
>  
> @@ -1336,6 +1343,7 @@ static void
> sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
>  	struct etnaviv_event *event)
>  {
>  	unsigned int i;
> +	u32 val;
>  
>  	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST);
>  
> @@ -1344,6 +1352,11 @@ static void
> sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
>  
>  		*pmr->bo_vma = pmr->sequence;
>  	}
> +
> +	/* enable clock gating */
> +	val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
> +	val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
> +	gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
>  }
>  
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 2e9f031..1e23472 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -1329,6 +1329,13 @@  static void sync_point_perfmon_sample(struct etnaviv_gpu *gpu,
 static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu,
 	struct etnaviv_event *event)
 {
+	u32 val;
+
+	/* disable clock gating */
+	val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
+	val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
+	gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
+
 	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE);
 }
 
@@ -1336,6 +1343,7 @@  static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
 	struct etnaviv_event *event)
 {
 	unsigned int i;
+	u32 val;
 
 	sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST);
 
@@ -1344,6 +1352,11 @@  static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu,
 
 		*pmr->bo_vma = pmr->sequence;
 	}
+
+	/* enable clock gating */
+	val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS);
+	val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING;
+	gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val);
 }