| Message ID | 20170629085740.31588-3-mahesh1.kumar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Jun 29, 2017 at 02:27:40PM +0530, Mahesh Kumar wrote: > GEN9+ Interlace fetch mode doesn't support pipe scaling, > This patch adds check to fail the flip if pipe scaling is requested in > Interlace fetch mode. > > Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> > --- > drivers/gpu/drm/i915/intel_atomic.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c > index 36d4e635e4ce..a1206d4f9a23 100644 > --- a/drivers/gpu/drm/i915/intel_atomic.c > +++ b/drivers/gpu/drm/i915/intel_atomic.c > @@ -224,6 +224,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, > struct intel_crtc_scaler_state *scaler_state = > &crtc_state->scaler_state; > struct drm_atomic_state *drm_state = crtc_state->base.state; > + const struct drm_display_mode *mode = &crtc_state->base.adjusted_mode; "adjusted_mode" > int num_scalers_need; > int i, j; > > @@ -248,6 +249,13 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, > return -EINVAL; > } > > + /* Scaling/fitting not supported in IF-ID mode in GEN9+ */ > + if (INTEL_GEN(dev_priv) >=9 && mode->flags & DRM_MODE_FLAG_INTERLACE && > + scaler_state->scaler_users & (1 << SKL_CRTC_INDEX)) { > + DRM_DEBUG_KMS("Pipe Scaling not supported with IF-ID mode\n"); > + return -EINVAL; > + } Hmm. I think if you put this into skl_update_scaler() then it'll catch both pipe and plane scalers for you automagically. > + > /* walkthrough scaler_users bits and start assigning scalers */ > for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { > int *scaler_id; > -- > 2.13.0
Hi, On Thursday 29 June 2017 07:46 PM, Ville Syrjälä wrote: > On Thu, Jun 29, 2017 at 02:27:40PM +0530, Mahesh Kumar wrote: >> GEN9+ Interlace fetch mode doesn't support pipe scaling, >> This patch adds check to fail the flip if pipe scaling is requested in >> Interlace fetch mode. >> >> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> >> --- >> drivers/gpu/drm/i915/intel_atomic.c | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c >> index 36d4e635e4ce..a1206d4f9a23 100644 >> --- a/drivers/gpu/drm/i915/intel_atomic.c >> +++ b/drivers/gpu/drm/i915/intel_atomic.c >> @@ -224,6 +224,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, >> struct intel_crtc_scaler_state *scaler_state = >> &crtc_state->scaler_state; >> struct drm_atomic_state *drm_state = crtc_state->base.state; >> + const struct drm_display_mode *mode = &crtc_state->base.adjusted_mode; > "adjusted_mode" ok > >> int num_scalers_need; >> int i, j; >> >> @@ -248,6 +249,13 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, >> return -EINVAL; >> } >> >> + /* Scaling/fitting not supported in IF-ID mode in GEN9+ */ >> + if (INTEL_GEN(dev_priv) >=9 && mode->flags & DRM_MODE_FLAG_INTERLACE && >> + scaler_state->scaler_users & (1 << SKL_CRTC_INDEX)) { >> + DRM_DEBUG_KMS("Pipe Scaling not supported with IF-ID mode\n"); >> + return -EINVAL; >> + } > Hmm. I think if you put this into skl_update_scaler() then it'll catch > both pipe and plane scalers for you automagically. will update. -Mahesh > >> + >> /* walkthrough scaler_users bits and start assigning scalers */ >> for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { >> int *scaler_id; >> -- >> 2.13.0
diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c index 36d4e635e4ce..a1206d4f9a23 100644 --- a/drivers/gpu/drm/i915/intel_atomic.c +++ b/drivers/gpu/drm/i915/intel_atomic.c @@ -224,6 +224,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; struct drm_atomic_state *drm_state = crtc_state->base.state; + const struct drm_display_mode *mode = &crtc_state->base.adjusted_mode; int num_scalers_need; int i, j; @@ -248,6 +249,13 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, return -EINVAL; } + /* Scaling/fitting not supported in IF-ID mode in GEN9+ */ + if (INTEL_GEN(dev_priv) >=9 && mode->flags & DRM_MODE_FLAG_INTERLACE && + scaler_state->scaler_users & (1 << SKL_CRTC_INDEX)) { + DRM_DEBUG_KMS("Pipe Scaling not supported with IF-ID mode\n"); + return -EINVAL; + } + /* walkthrough scaler_users bits and start assigning scalers */ for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { int *scaler_id;
GEN9+ Interlace fetch mode doesn't support pipe scaling, This patch adds check to fail the flip if pipe scaling is requested in Interlace fetch mode. Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> --- drivers/gpu/drm/i915/intel_atomic.c | 8 ++++++++ 1 file changed, 8 insertions(+)