diff mbox

[5/8] drm/i915: Upscale scaler max scale for NV12

Message ID 1497939034-5234-6-git-send-email-vidya.srinivas@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Srinivas, Vidya June 20, 2017, 6:10 a.m. UTC 
From: Chandra Konduru <chandra.konduru@intel.com>

This patch updates scaler max limit support for NV12

v2: Rebased (me)

Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++++--------
 drivers/gpu/drm/i915/intel_drv.h     |  3 ++-
 drivers/gpu/drm/i915/intel_sprite.c  |  3 ++-
 3 files changed, 24 insertions(+), 10 deletions(-)

Comments

Clint Taylor July 6, 2017, 10:37 p.m. UTC | #1 
On 06/19/2017 11:10 PM, Vidya Srinivas wrote:
> From: Chandra Konduru <chandra.konduru@intel.com>
>
> This patch updates scaler max limit support for NV12
>
> v2: Rebased (me)

Needs rebase again.

Tested-by: Clinton Taylor <clinton.a.taylor@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>

> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c | 28 ++++++++++++++++++++--------
>   drivers/gpu/drm/i915/intel_drv.h     |  3 ++-
>   drivers/gpu/drm/i915/intel_sprite.c  |  3 ++-
>   3 files changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 18559c8..9de836e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3438,6 +3438,8 @@ static u32 skl_plane_ctl_format(uint32_t pixel_format)
>   		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
>   	case DRM_FORMAT_VYUY:
>   		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
> +	case DRM_FORMAT_NV12:
> +		return PLANE_CTL_FORMAT_NV12;
>   	default:
>   		MISSING_CASE(pixel_format);
>   	}
> @@ -4801,7 +4803,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe)
>   static int
>   skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
>   		  unsigned int scaler_user, int *scaler_id,
> -		  int src_w, int src_h, int dst_w, int dst_h)
> +		  int src_w, int src_h, int dst_w, int dst_h,
> +		  uint32_t pixel_format)
>   {
>   	struct intel_crtc_scaler_state *scaler_state =
>   		&crtc_state->scaler_state;
> @@ -4814,7 +4817,8 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe)
>   	 * the 90/270 degree plane rotation cases (to match the
>   	 * GTT mapping), hence no need to account for rotation here.
>   	 */
> -	need_scaling = src_w != dst_w || src_h != dst_h;
> +	need_scaling = src_w != dst_w || src_h != dst_h ||
> +					(pixel_format == DRM_FORMAT_NV12);
>   
>   	/*
>   	 * if plane is being disabled or scaler is no more required or force detach
> @@ -4878,7 +4882,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state)
>   	return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX,
>   		&state->scaler_state.scaler_id,
>   		state->pipe_src_w, state->pipe_src_h,
> -		adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay);
> +		adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay, 0);
>   }
>   
>   /**
> @@ -4908,7 +4912,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>   				drm_rect_width(&plane_state->base.src) >> 16,
>   				drm_rect_height(&plane_state->base.src) >> 16,
>   				drm_rect_width(&plane_state->base.dst),
> -				drm_rect_height(&plane_state->base.dst));
> +				drm_rect_height(&plane_state->base.dst),
> +				fb ? fb->format->format : 0);
>   
>   	if (ret || plane_state->scaler_id < 0)
>   		return ret;
> @@ -4934,6 +4939,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>   	case DRM_FORMAT_YVYU:
>   	case DRM_FORMAT_UYVY:
>   	case DRM_FORMAT_VYUY:
> +	case DRM_FORMAT_NV12:
>   		break;
>   	default:
>   		DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
> @@ -13641,7 +13647,8 @@ static int intel_atomic_commit(struct drm_device *dev,
>   }
>   
>   int
> -skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state)
> +skl_max_scale(struct intel_crtc *intel_crtc,
> +	struct intel_crtc_state *crtc_state, uint32_t pixel_format)
>   {
>   	struct drm_i915_private *dev_priv;
>   	int max_scale;
> @@ -13667,8 +13674,9 @@ static int intel_atomic_commit(struct drm_device *dev,
>   	 *            or
>   	 *    cdclk/crtc_clock
>   	 */
> -	max_scale = min((1 << 16) * 3 - 1,
> -			(1 << 8) * ((max_dotclk << 8) / crtc_clock));
> +	max_scale = min((1 << 16) *
> +				(pixel_format == DRM_FORMAT_NV12 ? 2 : 3) - 1,
> +				(1 << 8) * ((max_dotclk << 8) / crtc_clock));
>   
>   	return max_scale;
>   }
> @@ -13689,7 +13697,11 @@ static int intel_atomic_commit(struct drm_device *dev,
>   		/* use scaler when colorkey is not required */
>   		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
>   			min_scale = 1;
> -			max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state);
> +			max_scale = skl_max_scale(to_intel_crtc(crtc),
> +						crtc_state,
> +						state->base.fb ?
> +						state->base.fb->format->format :
> +						0);
>   		}
>   		can_position = true;
>   	}
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index d93efb4..f6ebe45 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1480,7 +1480,8 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
>   				 struct intel_crtc_state *pipe_config);
>   
>   int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
> -int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
> +int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
> +	uint32_t pixel_format);
>   
>   static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
>   {
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index fba8f02..d4665d2 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -823,7 +823,8 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
>   		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
>   			can_scale = 1;
>   			min_scale = 1;
> -			max_scale = skl_max_scale(crtc, crtc_state);
> +			max_scale = skl_max_scale(crtc, crtc_state,
> +							fb->format->format);
>   		} else {
>   			can_scale = 0;
>   			min_scale = DRM_PLANE_HELPER_NO_SCALING;
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 18559c8..9de836e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3438,6 +3438,8 @@  static u32 skl_plane_ctl_format(uint32_t pixel_format)
 		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
 	case DRM_FORMAT_VYUY:
 		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
+	case DRM_FORMAT_NV12:
+		return PLANE_CTL_FORMAT_NV12;
 	default:
 		MISSING_CASE(pixel_format);
 	}
@@ -4801,7 +4803,8 @@  static void cpt_verify_modeset(struct drm_device *dev, int pipe)
 static int
 skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 		  unsigned int scaler_user, int *scaler_id,
-		  int src_w, int src_h, int dst_w, int dst_h)
+		  int src_w, int src_h, int dst_w, int dst_h,
+		  uint32_t pixel_format)
 {
 	struct intel_crtc_scaler_state *scaler_state =
 		&crtc_state->scaler_state;
@@ -4814,7 +4817,8 @@  static void cpt_verify_modeset(struct drm_device *dev, int pipe)
 	 * the 90/270 degree plane rotation cases (to match the
 	 * GTT mapping), hence no need to account for rotation here.
 	 */
-	need_scaling = src_w != dst_w || src_h != dst_h;
+	need_scaling = src_w != dst_w || src_h != dst_h ||
+					(pixel_format == DRM_FORMAT_NV12);
 
 	/*
 	 * if plane is being disabled or scaler is no more required or force detach
@@ -4878,7 +4882,7 @@  int skl_update_scaler_crtc(struct intel_crtc_state *state)
 	return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX,
 		&state->scaler_state.scaler_id,
 		state->pipe_src_w, state->pipe_src_h,
-		adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay);
+		adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay, 0);
 }
 
 /**
@@ -4908,7 +4912,8 @@  static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
 				drm_rect_width(&plane_state->base.src) >> 16,
 				drm_rect_height(&plane_state->base.src) >> 16,
 				drm_rect_width(&plane_state->base.dst),
-				drm_rect_height(&plane_state->base.dst));
+				drm_rect_height(&plane_state->base.dst),
+				fb ? fb->format->format : 0);
 
 	if (ret || plane_state->scaler_id < 0)
 		return ret;
@@ -4934,6 +4939,7 @@  static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
 	case DRM_FORMAT_YVYU:
 	case DRM_FORMAT_UYVY:
 	case DRM_FORMAT_VYUY:
+	case DRM_FORMAT_NV12:
 		break;
 	default:
 		DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -13641,7 +13647,8 @@  static int intel_atomic_commit(struct drm_device *dev,
 }
 
 int
-skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state)
+skl_max_scale(struct intel_crtc *intel_crtc,
+	struct intel_crtc_state *crtc_state, uint32_t pixel_format)
 {
 	struct drm_i915_private *dev_priv;
 	int max_scale;
@@ -13667,8 +13674,9 @@  static int intel_atomic_commit(struct drm_device *dev,
 	 *            or
 	 *    cdclk/crtc_clock
 	 */
-	max_scale = min((1 << 16) * 3 - 1,
-			(1 << 8) * ((max_dotclk << 8) / crtc_clock));
+	max_scale = min((1 << 16) *
+				(pixel_format == DRM_FORMAT_NV12 ? 2 : 3) - 1,
+				(1 << 8) * ((max_dotclk << 8) / crtc_clock));
 
 	return max_scale;
 }
@@ -13689,7 +13697,11 @@  static int intel_atomic_commit(struct drm_device *dev,
 		/* use scaler when colorkey is not required */
 		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
 			min_scale = 1;
-			max_scale = skl_max_scale(to_intel_crtc(crtc), crtc_state);
+			max_scale = skl_max_scale(to_intel_crtc(crtc),
+						crtc_state,
+						state->base.fb ?
+						state->base.fb->format->format :
+						0);
 		}
 		can_position = true;
 	}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d93efb4..f6ebe45 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1480,7 +1480,8 @@  void intel_mode_from_pipe_config(struct drm_display_mode *mode,
 				 struct intel_crtc_state *pipe_config);
 
 int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
-int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state);
+int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
+	uint32_t pixel_format);
 
 static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
 {
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index fba8f02..d4665d2 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -823,7 +823,8 @@  static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
 		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
 			can_scale = 1;
 			min_scale = 1;
-			max_scale = skl_max_scale(crtc, crtc_state);
+			max_scale = skl_max_scale(crtc, crtc_state,
+							fb->format->format);
 		} else {
 			can_scale = 0;
 			min_scale = DRM_PLANE_HELPER_NO_SCALING;