Message ID | 1499665789-20058-1-git-send-email-jiang.biao2@zte.com.cn (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 07/09/2017 07:49 PM, Jiang Biao wrote: > When running a helloworld program with qemu-i386 in linux-user > mode on Loongson 3A3000, it will crash. The reasion is wrong > assigning from base to addr_regl directly. This patch fix the > bug. > > Signed-off-by: Jiang Biao <jiang.biao2@zte.com.cn> > Signed-off-by: Richard Henderson <rth@twiddle.net> > --- > tcg/mips/tcg-target.inc.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c > index 8cff9a6..cebca8e 100644 > --- a/tcg/mips/tcg-target.inc.c > +++ b/tcg/mips/tcg-target.inc.c > @@ -1539,16 +1539,18 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) > s->code_ptr, label_ptr); > #else > if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) { > - tcg_out_ext32u(s, base, addr_regl); > - addr_regl = base; > + tcg_out_ext32u(s, TCG_TMP0, addr_regl); > + } else { > + tcg_out_mov(s, TCG_TYPE_PTR, TCG_TMP0, addr_regl); > } No, this is exactly why the assignment to the addr_regl variable exists, so that you do not need to emit an extra instruction for a 64-bit guest. r~
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 8cff9a6..cebca8e 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -1539,16 +1539,18 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) s->code_ptr, label_ptr); #else if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) { - tcg_out_ext32u(s, base, addr_regl); - addr_regl = base; + tcg_out_ext32u(s, TCG_TMP0, addr_regl); + } else { + tcg_out_mov(s, TCG_TYPE_PTR, TCG_TMP0, addr_regl); } + if (guest_base == 0 && data_regl != addr_regl) { base = addr_regl; } else if (guest_base == (int16_t)guest_base) { - tcg_out_opc_imm(s, ALIAS_PADDI, base, addr_regl, guest_base); + tcg_out_opc_imm(s, ALIAS_PADDI, base, TCG_TMP0, guest_base); } else { tcg_out_movi(s, TCG_TYPE_PTR, base, guest_base); - tcg_out_opc_reg(s, ALIAS_PADD, base, base, addr_regl); + tcg_out_opc_reg(s, ALIAS_PADD, base, base, TCG_TMP0); } tcg_out_qemu_ld_direct(s, data_regl, data_regh, base, opc, is_64); #endif