diff mbox

[i-g-t,3/3] tests/gem_reset_stats: Enforce full chip reset mode before run

Message ID 20170620182502.28553-3-michel.thierry@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michel Thierry June 20, 2017, 6:25 p.m. UTC
Platforms with per-engine reset enabled (i915.reset=2) are unlikely to
perform a full chip reset, keeping the reset_count unmodified. In order
to keep the expectations of this test, enforce that full GPU reset is
enabled (i915.reset=1).

Later on, we can expand the reset_stats ioctl to also return the number
of per-engine resets and use reset_count + reset_engine_count when
checking for the updated reset count.

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 tests/gem_reset_stats.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Comments

Arkadiusz Hiler July 6, 2017, 11:12 a.m. UTC | #1
On Tue, Jun 20, 2017 at 11:25:02AM -0700, Michel Thierry wrote:
> Platforms with per-engine reset enabled (i915.reset=2) are unlikely to
> perform a full chip reset, keeping the reset_count unmodified. In order
> to keep the expectations of this test, enforce that full GPU reset is
> enabled (i915.reset=1).
> 
> Later on, we can expand the reset_stats ioctl to also return the number
> of per-engine resets and use reset_count + reset_engine_count when
> checking for the updated reset count.
> 
> Signed-off-by: Michel Thierry <michel.thierry@intel.com>

This no longer applies due to changes in the context. It would be nice
if you would send rebased version as well :-)

@Antonio: any optionion on the patches? They LGTM, but an opinion of
someone more informed wouldn't hurt.
Michel Thierry July 6, 2017, 5:29 p.m. UTC | #2
On 06/07/17 04:12, Arkadiusz Hiler wrote:
> On Tue, Jun 20, 2017 at 11:25:02AM -0700, Michel Thierry wrote:
>> Platforms with per-engine reset enabled (i915.reset=2) are unlikely to
>> perform a full chip reset, keeping the reset_count unmodified. In order
>> to keep the expectations of this test, enforce that full GPU reset is
>> enabled (i915.reset=1).
>>
>> Later on, we can expand the reset_stats ioctl to also return the number
>> of per-engine resets and use reset_count + reset_engine_count when
>> checking for the updated reset count.
>>
>> Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> 
> This no longer applies due to changes in the context. It would be nice
> if you would send rebased version as well :-)

Hi Arek,

I think the v2 of these patches still apply cleanly,

https://patchwork.freedesktop.org/patch/164248/ and
https://patchwork.freedesktop.org/patch/164249/

> 
> @Antonio: any optionion on the patches? They LGTM, but an opinion of
> someone more informed wouldn't hurt.
> 

Indeed.

-Michel
Arkadiusz Hiler July 17, 2017, 8:37 a.m. UTC | #3
On Thu, Jul 06, 2017 at 10:29:41AM -0700, Michel Thierry wrote:
> On 06/07/17 04:12, Arkadiusz Hiler wrote:
> > On Tue, Jun 20, 2017 at 11:25:02AM -0700, Michel Thierry wrote:
> > > Platforms with per-engine reset enabled (i915.reset=2) are unlikely to
> > > perform a full chip reset, keeping the reset_count unmodified. In order
> > > to keep the expectations of this test, enforce that full GPU reset is
> > > enabled (i915.reset=1).
> > > 
> > > Later on, we can expand the reset_stats ioctl to also return the number
> > > of per-engine resets and use reset_count + reset_engine_count when
> > > checking for the updated reset count.
> > > 
> > > Signed-off-by: Michel Thierry <michel.thierry@intel.com>
> > 
> > This no longer applies due to changes in the context. It would be nice
> > if you would send rebased version as well :-)
> 
> Hi Arek,
> 
> I think the v2 of these patches still apply cleanly,
> 
> https://patchwork.freedesktop.org/patch/164248/ and
> https://patchwork.freedesktop.org/patch/164249/

Since you've said that you have a consensus with Antionio, and the
patches LGTM.

Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>

Pushed, thanks!
diff mbox

Patch

diff --git a/tests/gem_reset_stats.c b/tests/gem_reset_stats.c
index 73afeeb2..6777868f 100644
--- a/tests/gem_reset_stats.c
+++ b/tests/gem_reset_stats.c
@@ -27,6 +27,8 @@ 
 
 #define _GNU_SOURCE
 #include "igt.h"
+#include "igt_sysfs.h"
+#include <limits.h>
 #include <stdbool.h>
 #include <unistd.h>
 #include <stdlib.h>
@@ -777,15 +779,23 @@  igt_main
 		int fd;
 
 		bool has_reset_stats;
+		bool using_full_reset;
 		fd = drm_open_driver(DRIVER_INTEL);
 		devid = intel_get_drm_devid(fd);
 
 		has_reset_stats = gem_has_reset_stats(fd);
 
+		igt_assert(igt_sysfs_set_parameter
+			   (fd, "reset", "%d", 1 /* only global reset */));
+
+		using_full_reset = (gem_gpu_reset_type(fd) == 1);
+
 		close(fd);
 
 		igt_require_f(has_reset_stats,
 			      "No reset stats ioctl support. Too old kernel?\n");
+		igt_require_f(using_full_reset,
+			      "Full GPU reset is not enabled. Is enable_hangcheck set?\n");
 	}
 
 	igt_subtest("params")
@@ -831,4 +841,13 @@  igt_main
 		igt_subtest_f("defer-hangcheck-%s", e->name)
 			RUN_TEST(defer_hangcheck(e));
 	}
+
+	igt_fixture {
+		int fd;
+
+		fd = drm_open_driver(DRIVER_INTEL);
+		igt_assert(igt_sysfs_set_parameter
+			   (fd, "reset", "%d", INT_MAX /* any reset method */));
+		close(fd);
+	}
 }