diff mbox

clk: gemini: hands off PCI OE bit

Message ID 20170808190818.11740-1-linus.walleij@linaro.org (mailing list archive)
State Accepted, archived
Headers show

Commit Message

Linus Walleij Aug. 8, 2017, 7:08 p.m. UTC
This bit is pin control, and needs to be carefully managed by the
new pin control driver.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/clk/clk-gemini.c | 7 -------
 1 file changed, 7 deletions(-)

Comments

Stephen Boyd Aug. 9, 2017, 1:43 a.m. UTC | #1
On 08/08, Linus Walleij wrote:
> This bit is pin control, and needs to be carefully managed by the
> new pin control driver.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Fixes tag?

Does this need to be merged now as a critical fix? Or we can wait
on it for next release?
Linus Walleij Aug. 9, 2017, 8:11 a.m. UTC | #2
On Wed, Aug 9, 2017 at 3:43 AM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 08/08, Linus Walleij wrote:
>> This bit is pin control, and needs to be carefully managed by the
>> new pin control driver.
>>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>
> Fixes tag?

It's not a fix, it'd just that we move the responsibility of managing the
pin from the clock driver to the pin control driver.

I initially thought the Gemini would not need a separate pin control
driver because it was "simple" ... so these bits could be handled here
and there among the peripherals. Little did I know. Mea culpa.

> Does this need to be merged now as a critical fix? Or we can wait
> on it for next release?

Just put it in for the next release, thanks!

Yours,
Linus Walleij
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Stephen Boyd Aug. 9, 2017, 5:23 p.m. UTC | #3
On 08/09, Linus Walleij wrote:
> On Wed, Aug 9, 2017 at 3:43 AM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> > On 08/08, Linus Walleij wrote:
> >> This bit is pin control, and needs to be carefully managed by the
> >> new pin control driver.
> >>
> >> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> >
> > Fixes tag?
> 
> It's not a fix, it'd just that we move the responsibility of managing the
> pin from the clock driver to the pin control driver.
> 
> I initially thought the Gemini would not need a separate pin control
> driver because it was "simple" ... so these bits could be handled here
> and there among the peripherals. Little did I know. Mea culpa.
> 
> > Does this need to be merged now as a critical fix? Or we can wait
> > on it for next release?
> 
> Just put it in for the next release, thanks!
> 

Alright. Thanks!
Linus Walleij Aug. 28, 2017, 4:47 p.m. UTC | #4
On Wed, Aug 9, 2017 at 7:23 PM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 08/09, Linus Walleij wrote:
>> On Wed, Aug 9, 2017 at 3:43 AM, Stephen Boyd <sboyd@codeaurora.org> wrote:
>> > On 08/08, Linus Walleij wrote:
>> >> This bit is pin control, and needs to be carefully managed by the
>> >> new pin control driver.
>> >>
>> >> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>> >
>> > Fixes tag?
>>
>> It's not a fix, it'd just that we move the responsibility of managing the
>> pin from the clock driver to the pin control driver.
>>
>> I initially thought the Gemini would not need a separate pin control
>> driver because it was "simple" ... so these bits could be handled here
>> and there among the peripherals. Little did I know. Mea culpa.
>>
>> > Does this need to be merged now as a critical fix? Or we can wait
>> > on it for next release?
>>
>> Just put it in for the next release, thanks!
>>
>
> Alright. Thanks!

Stephen are you queueing this patch?

Or someone else from the clk group?

Yours,
Linus Walleij
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Stephen Boyd Aug. 31, 2017, 5:29 a.m. UTC | #5
On 08/08, Linus Walleij wrote:
> This bit is pin control, and needs to be carefully managed by the
> new pin control driver.
> 
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---

Applied to clk-next
diff mbox

Patch

diff --git a/drivers/clk/clk-gemini.c b/drivers/clk/clk-gemini.c
index b4cf2f699a21..f940e5af845b 100644
--- a/drivers/clk/clk-gemini.c
+++ b/drivers/clk/clk-gemini.c
@@ -37,7 +37,6 @@  static DEFINE_SPINLOCK(gemini_clk_lock);
 
 #define GEMINI_GLOBAL_MISC_CONTROL	0x30
 #define PCI_CLK_66MHZ			BIT(18)
-#define PCI_CLK_OE			BIT(17)
 
 #define GEMINI_GLOBAL_CLOCK_CONTROL	0x34
 #define PCI_CLKRUN_EN			BIT(16)
@@ -159,9 +158,6 @@  static int gemini_pci_enable(struct clk_hw *hw)
 
 	regmap_update_bits(pciclk->map, GEMINI_GLOBAL_CLOCK_CONTROL,
 			   0, PCI_CLKRUN_EN);
-	regmap_update_bits(pciclk->map,
-			   GEMINI_GLOBAL_MISC_CONTROL,
-			   0, PCI_CLK_OE);
 	return 0;
 }
 
@@ -169,9 +165,6 @@  static void gemini_pci_disable(struct clk_hw *hw)
 {
 	struct clk_gemini_pci *pciclk = to_pciclk(hw);
 
-	regmap_update_bits(pciclk->map,
-			   GEMINI_GLOBAL_MISC_CONTROL,
-			   PCI_CLK_OE, 0);
 	regmap_update_bits(pciclk->map, GEMINI_GLOBAL_CLOCK_CONTROL,
 			   PCI_CLKRUN_EN, 0);
 }