diff mbox

[v2,3/4] arm: traps: handle unknown exceptions in check_conditional_instr()

Message ID 1502307870-11317-4-git-send-email-volodymyr_babchuk@epam.com (mailing list archive)
State New, archived
Headers show

Commit Message

Volodymyr Babchuk Aug. 9, 2017, 7:44 p.m. UTC 
According to ARM architecture reference manual (ARM DDI 0487A.k page D7-1938,
ARM DDI 0406C.c page B3-1426), exception with unknown reason (HSR.EC == 0)
have no valid bits in HSR (apart from HSR.EC), so we can't check if that was
caused by conditional instruction. We need  assume that it is unconditional.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
---

- Added reference to the ARM manuals

---
 xen/arch/arm/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Julien Grall Aug. 9, 2017, 8:36 p.m. UTC | #1 
On 09/08/2017 20:44, Volodymyr Babchuk wrote:
> According to ARM architecture reference manual (ARM DDI 0487A.k page D7-1938,

Please quote a more recent ARM ARM. In general, please use the latest 
ARM ARM when sending code specific to the architecture.

Assuming this will be fixed in the next revision:

Acked-by: Julien Grall <julien.grall@arm.com>

Cheers,


> ARM DDI 0406C.c page B3-1426), exception with unknown reason (HSR.EC == 0)
> have no valid bits in HSR (apart from HSR.EC), so we can't check if that was
> caused by conditional instruction. We need  assume that it is unconditional.
>
> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
> ---
>
> - Added reference to the ARM manuals
>
> ---
>  xen/arch/arm/traps.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index c07999b..eae2212 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -1717,7 +1717,7 @@ static int check_conditional_instr(struct cpu_user_regs *regs,
>      int cond;
>
>      /* Unconditional Exception classes */
> -    if ( hsr.ec >= 0x10 )
> +    if ( hsr.ec == HSR_EC_UNKNOWN || hsr.ec >= 0x10 )
>          return 1;
>
>      /* Check for valid condition in hsr */
>
diff mbox

Patch

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index c07999b..eae2212 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1717,7 +1717,7 @@  static int check_conditional_instr(struct cpu_user_regs *regs,
     int cond;
 
     /* Unconditional Exception classes */
-    if ( hsr.ec >= 0x10 )
+    if ( hsr.ec == HSR_EC_UNKNOWN || hsr.ec >= 0x10 )
         return 1;
 
     /* Check for valid condition in hsr */