| Message ID | 1503532705-3692-2-git-send-email-oscar.mateo@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Aug 23, 2017 at 04:58:25PM -0700, Oscar Mateo wrote: > Facilitates creating Gen-specific versions of these functions later on. > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> > --- > drivers/gpu/drm/i915/i915_guc_submission.c | 4 ++-- > drivers/gpu/drm/i915/i915_irq.c | 12 +++++++++--- > drivers/gpu/drm/i915/intel_drv.h | 3 --- > drivers/gpu/drm/i915/intel_guc_log.c | 6 +++--- > drivers/gpu/drm/i915/intel_uc.c | 8 ++++---- > drivers/gpu/drm/i915/intel_uc.h | 4 ++++ > 6 files changed, 22 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c > index 48a1e93..63cd9da 100644 > --- a/drivers/gpu/drm/i915/i915_guc_submission.c > +++ b/drivers/gpu/drm/i915/i915_guc_submission.c > @@ -1302,7 +1302,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) > if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) > return 0; > > - gen9_disable_guc_interrupts(dev_priv); > + guc->disable_guc_interrupts(dev_priv); > > ctx = dev_priv->kernel_context; > > @@ -1329,7 +1329,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) > return 0; > > if (i915.guc_log_level >= 0) > - gen9_enable_guc_interrupts(dev_priv); > + guc->enable_guc_interrupts(dev_priv); > > ctx = dev_priv->kernel_context; > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 5d391e6..23be825 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -413,14 +413,14 @@ void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv) > gen6_reset_rps_interrupts(dev_priv); > } > > -void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv) > +static void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv) > { > spin_lock_irq(&dev_priv->irq_lock); > gen6_reset_pm_iir(dev_priv, dev_priv->pm_guc_events); > spin_unlock_irq(&dev_priv->irq_lock); > } > > -void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) > +static void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) > { > spin_lock_irq(&dev_priv->irq_lock); > if (!dev_priv->guc.interrupts_enabled) { > @@ -432,7 +432,7 @@ void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) > spin_unlock_irq(&dev_priv->irq_lock); > } > > -void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv) > +static void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv) > { > spin_lock_irq(&dev_priv->irq_lock); > dev_priv->guc.interrupts_enabled = false; > @@ -4164,6 +4164,12 @@ void intel_irq_init(struct drm_i915_private *dev_priv) > if (INTEL_GEN(dev_priv) >= 8) > dev_priv->rps.pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC; > > + if (INTEL_GEN(dev_priv) >= 9) { > + dev_priv->guc.reset_guc_interrupts = gen9_reset_guc_interrupts; > + dev_priv->guc.enable_guc_interrupts = gen9_enable_guc_interrupts; > + dev_priv->guc.disable_guc_interrupts = gen9_disable_guc_interrupts; > + } > + > if (IS_GEN2(dev_priv)) { > /* Gen2 doesn't have a hardware frame counter */ > dev->max_vblank_count = 0; > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 74c1860..442d378 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1234,9 +1234,6 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv, > u8 pipe_mask); > void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv, > u8 pipe_mask); > -void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv); > -void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv); > -void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv); > > /* intel_crt.c */ > void intel_crt_init(struct drm_i915_private *dev_priv); > diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c > index 16d3b87..d402900 100644 > --- a/drivers/gpu/drm/i915/intel_guc_log.c > +++ b/drivers/gpu/drm/i915/intel_guc_log.c > @@ -506,7 +506,7 @@ static void guc_flush_logs(struct intel_guc *guc) > return; > > /* First disable the interrupts, will be renabled afterwards */ > - gen9_disable_guc_interrupts(dev_priv); > + guc->disable_guc_interrupts(dev_priv); > > /* Before initiating the forceful flush, wait for any pending/ongoing > * flush to complete otherwise forceful flush may not actually happen. > @@ -623,7 +623,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) > } > > /* GuC logging is currently the only user of Guc2Host interrupts */ > - gen9_enable_guc_interrupts(dev_priv); > + guc->enable_guc_interrupts(dev_priv); > } else { > /* Once logging is disabled, GuC won't generate logs & send an > * interrupt. But there could be some data in the log buffer > @@ -656,7 +656,7 @@ void i915_guc_log_unregister(struct drm_i915_private *dev_priv) > > mutex_lock(&dev_priv->drm.struct_mutex); > /* GuC logging is currently the only user of Guc2Host interrupts */ > - gen9_disable_guc_interrupts(dev_priv); > + dev_priv->guc.enable_guc_interrupts(dev_priv); > guc_log_runtime_destroy(&dev_priv->guc); > mutex_unlock(&dev_priv->drm.struct_mutex); > } > diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c > index 0178ba4..6df0d3b 100644 > --- a/drivers/gpu/drm/i915/intel_uc.c > +++ b/drivers/gpu/drm/i915/intel_uc.c > @@ -337,7 +337,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) > return 0; > > guc_disable_communication(guc); > - gen9_reset_guc_interrupts(dev_priv); > + guc->reset_guc_interrupts(dev_priv); > > /* We need to notify the guc whenever we change the GGTT */ > i915_ggtt_enable_guc(dev_priv); > @@ -393,7 +393,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) > intel_guc_auth_huc(dev_priv); > if (i915.enable_guc_submission) { > if (i915.guc_log_level >= 0) > - gen9_enable_guc_interrupts(dev_priv); > + guc->enable_guc_interrupts(dev_priv); > > ret = i915_guc_submission_enable(dev_priv); > if (ret) > @@ -413,7 +413,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) > */ > err_interrupts: > guc_disable_communication(guc); > - gen9_disable_guc_interrupts(dev_priv); > + guc->disable_guc_interrupts(dev_priv); > err_log_capture: > guc_capture_load_err_log(guc); > err_submission: > @@ -452,7 +452,7 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) > guc_disable_communication(&dev_priv->guc); > > if (i915.enable_guc_submission) { > - gen9_disable_guc_interrupts(dev_priv); > + dev_priv->guc.disable_guc_interrupts(dev_priv); > i915_guc_submission_fini(dev_priv); > } > > diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h > index 22ae52b..e862454 100644 > --- a/drivers/gpu/drm/i915/intel_uc.h > +++ b/drivers/gpu/drm/i915/intel_uc.h > @@ -210,6 +210,10 @@ struct intel_guc { > > /* GuC's FW specific notify function */ > void (*notify)(struct intel_guc *guc); > + > + void (*reset_guc_interrupts)(struct drm_i915_private *dev_priv); > + void (*enable_guc_interrupts)(struct drm_i915_private *dev_priv); > + void (*disable_guc_interrupts)(struct drm_i915_private *dev_priv); These vfuncs are defined on the "guc" struct so you can drop "_guc" from their names. And maybe they shall be closer to existing "interrupts_enabled" field to keep all related stuff together. Then we can try to do like this: - bool interrupts_enabled; + struct { + bool enabled; + void (*reset)(struct drm_i915_private *dev_priv); + void (*enable)(struct drm_i915_private *dev_priv); + void (*disable)(struct drm_i915_private *dev_priv); + } interrupts; Thanks, Michal > }; > > struct intel_huc { > -- > 1.9.1 >
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 48a1e93..63cd9da 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1302,7 +1302,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - gen9_disable_guc_interrupts(dev_priv); + guc->disable_guc_interrupts(dev_priv); ctx = dev_priv->kernel_context; @@ -1329,7 +1329,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) return 0; if (i915.guc_log_level >= 0) - gen9_enable_guc_interrupts(dev_priv); + guc->enable_guc_interrupts(dev_priv); ctx = dev_priv->kernel_context; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5d391e6..23be825 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -413,14 +413,14 @@ void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv) gen6_reset_rps_interrupts(dev_priv); } -void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv) +static void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv) { spin_lock_irq(&dev_priv->irq_lock); gen6_reset_pm_iir(dev_priv, dev_priv->pm_guc_events); spin_unlock_irq(&dev_priv->irq_lock); } -void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) +static void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) { spin_lock_irq(&dev_priv->irq_lock); if (!dev_priv->guc.interrupts_enabled) { @@ -432,7 +432,7 @@ void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv) spin_unlock_irq(&dev_priv->irq_lock); } -void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv) +static void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv) { spin_lock_irq(&dev_priv->irq_lock); dev_priv->guc.interrupts_enabled = false; @@ -4164,6 +4164,12 @@ void intel_irq_init(struct drm_i915_private *dev_priv) if (INTEL_GEN(dev_priv) >= 8) dev_priv->rps.pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC; + if (INTEL_GEN(dev_priv) >= 9) { + dev_priv->guc.reset_guc_interrupts = gen9_reset_guc_interrupts; + dev_priv->guc.enable_guc_interrupts = gen9_enable_guc_interrupts; + dev_priv->guc.disable_guc_interrupts = gen9_disable_guc_interrupts; + } + if (IS_GEN2(dev_priv)) { /* Gen2 doesn't have a hardware frame counter */ dev->max_vblank_count = 0; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 74c1860..442d378 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1234,9 +1234,6 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv, u8 pipe_mask); void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv, u8 pipe_mask); -void gen9_reset_guc_interrupts(struct drm_i915_private *dev_priv); -void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv); -void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv); /* intel_crt.c */ void intel_crt_init(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c index 16d3b87..d402900 100644 --- a/drivers/gpu/drm/i915/intel_guc_log.c +++ b/drivers/gpu/drm/i915/intel_guc_log.c @@ -506,7 +506,7 @@ static void guc_flush_logs(struct intel_guc *guc) return; /* First disable the interrupts, will be renabled afterwards */ - gen9_disable_guc_interrupts(dev_priv); + guc->disable_guc_interrupts(dev_priv); /* Before initiating the forceful flush, wait for any pending/ongoing * flush to complete otherwise forceful flush may not actually happen. @@ -623,7 +623,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val) } /* GuC logging is currently the only user of Guc2Host interrupts */ - gen9_enable_guc_interrupts(dev_priv); + guc->enable_guc_interrupts(dev_priv); } else { /* Once logging is disabled, GuC won't generate logs & send an * interrupt. But there could be some data in the log buffer @@ -656,7 +656,7 @@ void i915_guc_log_unregister(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->drm.struct_mutex); /* GuC logging is currently the only user of Guc2Host interrupts */ - gen9_disable_guc_interrupts(dev_priv); + dev_priv->guc.enable_guc_interrupts(dev_priv); guc_log_runtime_destroy(&dev_priv->guc); mutex_unlock(&dev_priv->drm.struct_mutex); } diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 0178ba4..6df0d3b 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -337,7 +337,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) return 0; guc_disable_communication(guc); - gen9_reset_guc_interrupts(dev_priv); + guc->reset_guc_interrupts(dev_priv); /* We need to notify the guc whenever we change the GGTT */ i915_ggtt_enable_guc(dev_priv); @@ -393,7 +393,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) intel_guc_auth_huc(dev_priv); if (i915.enable_guc_submission) { if (i915.guc_log_level >= 0) - gen9_enable_guc_interrupts(dev_priv); + guc->enable_guc_interrupts(dev_priv); ret = i915_guc_submission_enable(dev_priv); if (ret) @@ -413,7 +413,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) */ err_interrupts: guc_disable_communication(guc); - gen9_disable_guc_interrupts(dev_priv); + guc->disable_guc_interrupts(dev_priv); err_log_capture: guc_capture_load_err_log(guc); err_submission: @@ -452,7 +452,7 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) guc_disable_communication(&dev_priv->guc); if (i915.enable_guc_submission) { - gen9_disable_guc_interrupts(dev_priv); + dev_priv->guc.disable_guc_interrupts(dev_priv); i915_guc_submission_fini(dev_priv); } diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 22ae52b..e862454 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -210,6 +210,10 @@ struct intel_guc { /* GuC's FW specific notify function */ void (*notify)(struct intel_guc *guc); + + void (*reset_guc_interrupts)(struct drm_i915_private *dev_priv); + void (*enable_guc_interrupts)(struct drm_i915_private *dev_priv); + void (*disable_guc_interrupts)(struct drm_i915_private *dev_priv); }; struct intel_huc {
Facilitates creating Gen-specific versions of these functions later on. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> --- drivers/gpu/drm/i915/i915_guc_submission.c | 4 ++-- drivers/gpu/drm/i915/i915_irq.c | 12 +++++++++--- drivers/gpu/drm/i915/intel_drv.h | 3 --- drivers/gpu/drm/i915/intel_guc_log.c | 6 +++--- drivers/gpu/drm/i915/intel_uc.c | 8 ++++---- drivers/gpu/drm/i915/intel_uc.h | 4 ++++ 6 files changed, 22 insertions(+), 15 deletions(-)