Message ID | 20170823125740.342120870@cogentembedded.com (mailing list archive) |
---|---|
State | Changes Requested, archived |
Headers | show |
Hi Sergei, On Wed, Aug 23, 2017 at 2:52 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Add macros usable by the device tree sources to reference the R8A7797 CPG > clocks by index. > > Based on the original (and large) patch by Daisuke Matsushita > <daisuke.matsushita.ns@hitachi.com>. Please refer to Table 8.2c ("List of Clocks [R-Car V3M]") of the R-Car Series, 3rd Generation Hardware User's Manual (Rev. 0.55, Jun. 30, 2017). > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > --- > include/dt-bindings/clock/r8a7797-cpg-mssr.h | 48 +++++++++++++++++++++++++++ > 1 file changed, 48 insertions(+) > > Index: linux/include/dt-bindings/clock/r8a7797-cpg-mssr.h > =================================================================== > --- /dev/null > +++ linux/include/dt-bindings/clock/r8a7797-cpg-mssr.h Please use "r8a77970-cpg-mssr.h", to follow the new 5-digit scheme started with r8a77995. > @@ -0,0 +1,48 @@ > +/* > + * Copyright (C) 2016 Renesas Electronics Corp. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + */ > +#ifndef __DT_BINDINGS_CLOCK_R8A7797_CPG_MSSR_H__ > +#define __DT_BINDINGS_CLOCK_R8A7797_CPG_MSSR_H__ ...R8A77970... > + > +#include <dt-bindings/clock/renesas-cpg-mssr.h> > + > +/* r8a7797 CPG Core Clocks */ > +#define R8A7797_CLK_Z2 0 #define R8A77970_... > +#define R8A7797_CLK_CSIREF 26 The CSIREF clock was dropped in Rev. 0.54 of the datasheet. Please remove it. > +#define R8A7797_CLK_FRAY 27 > +#define R8A7797_CLK_CP 28 > +#define R8A7797_CLK_CPEX 29 > +#define R8A7797_CLK_R 30 > +#define R8A7797_CLK_OSC 31 With the above fixed: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Index: linux/include/dt-bindings/clock/r8a7797-cpg-mssr.h =================================================================== --- /dev/null +++ linux/include/dt-bindings/clock/r8a7797-cpg-mssr.h @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2016 Renesas Electronics Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A7797_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7797_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a7797 CPG Core Clocks */ +#define R8A7797_CLK_Z2 0 +#define R8A7797_CLK_ZR 1 +#define R8A7797_CLK_ZTR 2 +#define R8A7797_CLK_ZTRD2 3 +#define R8A7797_CLK_ZT 4 +#define R8A7797_CLK_ZX 5 +#define R8A7797_CLK_S1D1 6 +#define R8A7797_CLK_S1D2 7 +#define R8A7797_CLK_S1D4 8 +#define R8A7797_CLK_S2D1 9 +#define R8A7797_CLK_S2D2 10 +#define R8A7797_CLK_S2D4 11 +#define R8A7797_CLK_LB 12 +#define R8A7797_CLK_CL 13 +#define R8A7797_CLK_ZB3 14 +#define R8A7797_CLK_ZB3D2 15 +#define R8A7797_CLK_DDR 16 +#define R8A7797_CLK_CR 17 +#define R8A7797_CLK_CRD2 18 +#define R8A7797_CLK_SD0H 19 +#define R8A7797_CLK_SD0 20 +#define R8A7797_CLK_RPC 21 +#define R8A7797_CLK_RPCD2 22 +#define R8A7797_CLK_MSO 23 +#define R8A7797_CLK_CANFD 24 +#define R8A7797_CLK_CSI0 25 +#define R8A7797_CLK_CSIREF 26 +#define R8A7797_CLK_FRAY 27 +#define R8A7797_CLK_CP 28 +#define R8A7797_CLK_CPEX 29 +#define R8A7797_CLK_R 30 +#define R8A7797_CLK_OSC 31 + +#endif /* __DT_BINDINGS_CLOCK_R8A7797_CPG_MSSR_H__ */