diff mbox

[3/3] dmaengine: sun6i: Add support for Allwinner A64

Message ID 20170830233609.13855-4-stefan.bruens@rwth-aachen.de (mailing list archive)
State Changes Requested
Headers show

Commit Message

Stefan Brüns Aug. 30, 2017, 11:36 p.m. UTC
The A64 SoC has the same dma engine as the H3 (sun8i), with a
reduced amount of physical channels. Add the proper config data
and compatible string to support it.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++
 drivers/dma/sun6i-dma.c                       | 7 +++++++
 2 files changed, 11 insertions(+)

Comments

Code Kipper Aug. 31, 2017, 11:44 a.m. UTC | #1
On 31 August 2017 at 01:36, Stefan Brüns <stefan.bruens@rwth-aachen.de> wrote:
> The A64 SoC has the same dma engine as the H3 (sun8i), with a
> reduced amount of physical channels. Add the proper config data
> and compatible string to support it.
>
> Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++
>  drivers/dma/sun6i-dma.c                       | 7 +++++++
>  2 files changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index f96287d3043a..b86019238b77 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -494,6 +494,8 @@
>                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
>                         clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
>                         clock-names = "ahb", "mod";
> +                       dmas = <&dma 23>, <&dma 23>;
> +                       dma-names = "rx", "tx";
Hi Stefan,
the dtsi parts should be in a separate patch

>                         pinctrl-names = "default";
>                         pinctrl-0 = <&spi0_pins>;
>                         resets = <&ccu RST_BUS_SPI0>;
> @@ -509,6 +511,8 @@
>                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
>                         clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
>                         clock-names = "ahb", "mod";
> +                       dmas = <&dma 24>, <&dma 24>;
> +                       dma-names = "rx", "tx";
>                         pinctrl-names = "default";
>                         pinctrl-0 = <&spi1_pins>;
>                         resets = <&ccu RST_BUS_SPI1>;
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index 5f4eee4513e5..6a17c5d63582 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1068,6 +1068,12 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg = {
>         .nr_max_vchans   = 34,
>         .dmac_variant    = DMAC_VARIANT_H3,
>  };
> +
> +static struct sun6i_dma_config sun50i_a64_dma_cfg = {
> +       .nr_max_channels = 8,
> +       .nr_max_requests = 27,
> +       .nr_max_vchans   = 38,
> +       .dmac_variant    = DMAC_VARIANT_H3,
>  };
>
>  static const struct of_device_id sun6i_dma_match[] = {
> @@ -1075,6 +1081,7 @@ static const struct of_device_id sun6i_dma_match[] = {
>         { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
>         { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
>         { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
> +       { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
This all looks fine...it's similar to my patch here
https://github.com/codekipper/linux-sunxi/commit/8c54d9852dfad6ceb478c579a1213f38fb12fa80
which I've been too lazy to post. I think the binding documentation
should go with this patch and this should also be the 1st patch in the
series, followed by the dtsi changes.
BR,
CK
>         { /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, sun6i_dma_match);
> --
> 2.14.1
>
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Maxime Ripard Aug. 31, 2017, 2:52 p.m. UTC | #2
On Thu, Aug 31, 2017 at 01:36:09AM +0200, Stefan Brüns wrote:
> The A64 SoC has the same dma engine as the H3 (sun8i), with a
> reduced amount of physical channels. Add the proper config data
> and compatible string to support it.
> 
> Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++
>  drivers/dma/sun6i-dma.c                       | 7 +++++++
>  2 files changed, 11 insertions(+)

With what device did you test this? As far as I know, the SPI driver
doesn't use DMA at all.

Maxime
Code Kipper Aug. 31, 2017, 4:35 p.m. UTC | #3
On 31 August 2017 at 16:52, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Thu, Aug 31, 2017 at 01:36:09AM +0200, Stefan Brüns wrote:
>> The A64 SoC has the same dma engine as the H3 (sun8i), with a
>> reduced amount of physical channels. Add the proper config data
>> and compatible string to support it.
>>
>> Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
>> ---
>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++
>>  drivers/dma/sun6i-dma.c                       | 7 +++++++
>>  2 files changed, 11 insertions(+)
>
> With what device did you test this? As far as I know, the SPI driver
> doesn't use DMA at all.
>
Hi Maxime,
I've tested this on spdif and i2s on the Pine64.
BR,
CK
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
>
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diff mbox

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index f96287d3043a..b86019238b77 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -494,6 +494,8 @@ 
 			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
 			clock-names = "ahb", "mod";
+			dmas = <&dma 23>, <&dma 23>;
+			dma-names = "rx", "tx";
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi0_pins>;
 			resets = <&ccu RST_BUS_SPI0>;
@@ -509,6 +511,8 @@ 
 			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
 			clock-names = "ahb", "mod";
+			dmas = <&dma 24>, <&dma 24>;
+			dma-names = "rx", "tx";
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi1_pins>;
 			resets = <&ccu RST_BUS_SPI1>;
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 5f4eee4513e5..6a17c5d63582 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -1068,6 +1068,12 @@  static struct sun6i_dma_config sun8i_h3_dma_cfg = {
 	.nr_max_vchans   = 34,
 	.dmac_variant    = DMAC_VARIANT_H3,
 };
+
+static struct sun6i_dma_config sun50i_a64_dma_cfg = {
+	.nr_max_channels = 8,
+	.nr_max_requests = 27,
+	.nr_max_vchans   = 38,
+	.dmac_variant    = DMAC_VARIANT_H3,
 };
 
 static const struct of_device_id sun6i_dma_match[] = {
@@ -1075,6 +1081,7 @@  static const struct of_device_id sun6i_dma_match[] = {
 	{ .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
 	{ .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
 	{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
+	{ .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sun6i_dma_match);