diff mbox

[1/1] drm/i915: Move i915_gem_suspend_gtt_mappings to i915_gem_suspend

Message ID 1507226857-20153-1-git-send-email-sagar.a.kamble@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sagar.a.kamble@intel.com Oct. 5, 2017, 6:07 p.m. UTC
suspend_gtt_mappings was happening post i915_gem_suspend where
GPU is reset in the end. Call it before i915_gem_sanitize.
This also makes portion of i915_gem_suspend symmetrical to
i915_gem_resume and will facilitate proper ordering of GuC resume
where ggtt.invalidate gets updated.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 2 --
 drivers/gpu/drm/i915/i915_gem.c | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

Comments

Chris Wilson Oct. 5, 2017, 6:11 p.m. UTC | #1
Quoting Sagar Arun Kamble (2017-10-05 19:07:37)
> suspend_gtt_mappings was happening post i915_gem_suspend where
> GPU is reset in the end. Call it before i915_gem_sanitize.
> This also makes portion of i915_gem_suspend symmetrical to
> i915_gem_resume and will facilitate proper ordering of GuC resume
> where ggtt.invalidate gets updated.
> 
> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 2 --
>  drivers/gpu/drm/i915/i915_gem.c | 2 ++
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 66fc156..05c71a9 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1558,8 +1558,6 @@ static int i915_drm_suspend(struct drm_device *dev)
>  
>         intel_suspend_hw(dev_priv);
>  
> -       i915_gem_suspend_gtt_mappings(dev_priv);
> -
>         i915_save_state(dev_priv);
>  
>         opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold;
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ab8c694..4abd6fd 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4557,6 +4557,8 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
>         if (WARN_ON(!intel_engines_are_idle(dev_priv)))
>                 i915_gem_set_wedged(dev_priv); /* no hope, discard everything */
>  
> +       i915_gem_suspend_gtt_mappings(dev_priv);

Hmm. suspend_gtt_mappings zaps the GGTT. We shouldn't do that before we
shutdown the display. Maybe we need to move the i915_gem_sanitize instead?
-Chris
sagar.a.kamble@intel.com Oct. 5, 2017, 6:17 p.m. UTC | #2
On 10/5/2017 11:41 PM, Chris Wilson wrote:
> Quoting Sagar Arun Kamble (2017-10-05 19:07:37)
>> suspend_gtt_mappings was happening post i915_gem_suspend where
>> GPU is reset in the end. Call it before i915_gem_sanitize.
>> This also makes portion of i915_gem_suspend symmetrical to
>> i915_gem_resume and will facilitate proper ordering of GuC resume
>> where ggtt.invalidate gets updated.
>>
>> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Michał Winiarski <michal.winiarski@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.c | 2 --
>>   drivers/gpu/drm/i915/i915_gem.c | 2 ++
>>   2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>> index 66fc156..05c71a9 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -1558,8 +1558,6 @@ static int i915_drm_suspend(struct drm_device *dev)
>>   
>>          intel_suspend_hw(dev_priv);
>>   
>> -       i915_gem_suspend_gtt_mappings(dev_priv);
>> -
>>          i915_save_state(dev_priv);
>>   
>>          opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold;
>> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>> index ab8c694..4abd6fd 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -4557,6 +4557,8 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
>>          if (WARN_ON(!intel_engines_are_idle(dev_priv)))
>>                  i915_gem_set_wedged(dev_priv); /* no hope, discard everything */
>>   
>> +       i915_gem_suspend_gtt_mappings(dev_priv);
> Hmm. suspend_gtt_mappings zaps the GGTT. We shouldn't do that before we
> shutdown the display. Maybe we need to move the i915_gem_sanitize instead?
> -Chris
Any particular reason gem_suspend is being done prior to display 
suspend? ...
if we could change that order current gem_suspend (i915_gem_suspend post 
intel_suspend*) with this fix should be fine ...
Else will have to call gem_sanitize separately.
Chris Wilson Oct. 5, 2017, 6:22 p.m. UTC | #3
Quoting Sagar Arun Kamble (2017-10-05 19:17:46)
> 
> 
> On 10/5/2017 11:41 PM, Chris Wilson wrote:
> > Quoting Sagar Arun Kamble (2017-10-05 19:07:37)
> >> suspend_gtt_mappings was happening post i915_gem_suspend where
> >> GPU is reset in the end. Call it before i915_gem_sanitize.
> >> This also makes portion of i915_gem_suspend symmetrical to
> >> i915_gem_resume and will facilitate proper ordering of GuC resume
> >> where ggtt.invalidate gets updated.
> >>
> >> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> >> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> >> Cc: Michał Winiarski <michal.winiarski@intel.com>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/i915_drv.c | 2 --
> >>   drivers/gpu/drm/i915/i915_gem.c | 2 ++
> >>   2 files changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> >> index 66fc156..05c71a9 100644
> >> --- a/drivers/gpu/drm/i915/i915_drv.c
> >> +++ b/drivers/gpu/drm/i915/i915_drv.c
> >> @@ -1558,8 +1558,6 @@ static int i915_drm_suspend(struct drm_device *dev)
> >>   
> >>          intel_suspend_hw(dev_priv);
> >>   
> >> -       i915_gem_suspend_gtt_mappings(dev_priv);
> >> -
> >>          i915_save_state(dev_priv);
> >>   
> >>          opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold;
> >> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> >> index ab8c694..4abd6fd 100644
> >> --- a/drivers/gpu/drm/i915/i915_gem.c
> >> +++ b/drivers/gpu/drm/i915/i915_gem.c
> >> @@ -4557,6 +4557,8 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
> >>          if (WARN_ON(!intel_engines_are_idle(dev_priv)))
> >>                  i915_gem_set_wedged(dev_priv); /* no hope, discard everything */
> >>   
> >> +       i915_gem_suspend_gtt_mappings(dev_priv);
> > Hmm. suspend_gtt_mappings zaps the GGTT. We shouldn't do that before we
> > shutdown the display. Maybe we need to move the i915_gem_sanitize instead?
> > -Chris
> Any particular reason gem_suspend is being done prior to display 
> suspend? ...

It grew from idling the GPU as the first action - which makes sure that
user updates to the screen stop etc.

> if we could change that order current gem_suspend (i915_gem_suspend post 
> intel_suspend*) with this fix should be fine ...
> Else will have to call gem_sanitize separately.

I guess we are looking at splitting gem_suspend into the user quiescing
section and the hw cleanup.
-Chris
sagar.a.kamble@intel.com Oct. 5, 2017, 6:30 p.m. UTC | #4
On 10/5/2017 11:52 PM, Chris Wilson wrote:
> Quoting Sagar Arun Kamble (2017-10-05 19:17:46)
>>
>> On 10/5/2017 11:41 PM, Chris Wilson wrote:
>>> Quoting Sagar Arun Kamble (2017-10-05 19:07:37)
>>>> suspend_gtt_mappings was happening post i915_gem_suspend where
>>>> GPU is reset in the end. Call it before i915_gem_sanitize.
>>>> This also makes portion of i915_gem_suspend symmetrical to
>>>> i915_gem_resume and will facilitate proper ordering of GuC resume
>>>> where ggtt.invalidate gets updated.
>>>>
>>>> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>>>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>>>> Cc: Michał Winiarski <michal.winiarski@intel.com>
>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>>>> ---
>>>>    drivers/gpu/drm/i915/i915_drv.c | 2 --
>>>>    drivers/gpu/drm/i915/i915_gem.c | 2 ++
>>>>    2 files changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>>>> index 66fc156..05c71a9 100644
>>>> --- a/drivers/gpu/drm/i915/i915_drv.c
>>>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>>>> @@ -1558,8 +1558,6 @@ static int i915_drm_suspend(struct drm_device *dev)
>>>>    
>>>>           intel_suspend_hw(dev_priv);
>>>>    
>>>> -       i915_gem_suspend_gtt_mappings(dev_priv);
>>>> -
>>>>           i915_save_state(dev_priv);
>>>>    
>>>>           opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold;
>>>> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>>>> index ab8c694..4abd6fd 100644
>>>> --- a/drivers/gpu/drm/i915/i915_gem.c
>>>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>>>> @@ -4557,6 +4557,8 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
>>>>           if (WARN_ON(!intel_engines_are_idle(dev_priv)))
>>>>                   i915_gem_set_wedged(dev_priv); /* no hope, discard everything */
>>>>    
>>>> +       i915_gem_suspend_gtt_mappings(dev_priv);
>>> Hmm. suspend_gtt_mappings zaps the GGTT. We shouldn't do that before we
>>> shutdown the display. Maybe we need to move the i915_gem_sanitize instead?
>>> -Chris
>> Any particular reason gem_suspend is being done prior to display
>> suspend? ...
> It grew from idling the GPU as the first action - which makes sure that
> user updates to the screen stop etc.
>
>> if we could change that order current gem_suspend (i915_gem_suspend post
>> intel_suspend*) with this fix should be fine ...
>> Else will have to call gem_sanitize separately.
> I guess we are looking at splitting gem_suspend into the user quiescing
> section and the hw cleanup.
Ok. Will split then.
> -Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 66fc156..05c71a9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1558,8 +1558,6 @@  static int i915_drm_suspend(struct drm_device *dev)
 
 	intel_suspend_hw(dev_priv);
 
-	i915_gem_suspend_gtt_mappings(dev_priv);
-
 	i915_save_state(dev_priv);
 
 	opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ab8c694..4abd6fd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4557,6 +4557,8 @@  int i915_gem_suspend(struct drm_i915_private *dev_priv)
 	if (WARN_ON(!intel_engines_are_idle(dev_priv)))
 		i915_gem_set_wedged(dev_priv); /* no hope, discard everything */
 
+	i915_gem_suspend_gtt_mappings(dev_priv);
+
 	/*
 	 * Neither the BIOS, ourselves or any other kernel
 	 * expects the system to be in execlists mode on startup,