| Message ID | 1507712056-25030-19-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, 11 Oct 2017 10:54:13 +0200, Sagar Arun Kamble <sagar.a.kamble@intel.com> wrote: > In i915_reset/gem_sanitize, GPU will be reset and driver state about > GuC/HuC load status will be invalid. Hence, we mark both GuC/HuC as not > loaded/NONE. > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Michał Winiarski <michal.winiarski@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_gem.c | 4 ++++ > drivers/gpu/drm/i915/intel_uc.c | 18 ++++++++++++++++++ > drivers/gpu/drm/i915/intel_uc.h | 1 + > 3 files changed, 23 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c > b/drivers/gpu/drm/i915/i915_gem.c > index f1a785a..a4bbf6c 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -2954,6 +2954,8 @@ int i915_gem_reset_prepare(struct drm_i915_private > *dev_priv) > i915_gem_revoke_fences(dev_priv); > + intel_uc_sanitize(dev_priv); > + > return err; > } > @@ -4636,6 +4638,8 @@ void i915_gem_sanitize(struct drm_i915_private > *i915) > mutex_unlock(&i915->drm.struct_mutex); > } > + intel_uc_sanitize(i915); > + > /* > * If we inherit context state from the BIOS or earlier occupants > * of the GPU, the GPU may be in an inconsistent state when we > diff --git a/drivers/gpu/drm/i915/intel_uc.c > b/drivers/gpu/drm/i915/intel_uc.c > index 25acf8f..9010ab5 100644 > --- a/drivers/gpu/drm/i915/intel_uc.c > +++ b/drivers/gpu/drm/i915/intel_uc.c > @@ -438,3 +438,21 @@ void intel_uc_runtime_resume(struct > drm_i915_private *dev_priv) > intel_uc_init_hw(dev_priv); > } > + > +/** > + * intel_uc_sanitize() - Sanitize uC state. > + * @dev_priv: i915 device private > + * > + * This function marks load_status as FIRMWARE_NONE and sanitizes state > of > + * other GuC tasks. > + */ > +void intel_uc_sanitize(struct drm_i915_private *dev_priv) > +{ > + struct intel_uc_fw *guc_fw = &dev_priv->guc.fw; > + struct intel_uc_fw *huc_fw = &dev_priv->huc.fw; nitpick: struct intel_guc *guc = &dev_priv->guc; struct intel_huc *huc = &dev_priv->huc; > + > + if (i915_modparams.enable_guc_loading) { > + guc_fw->load_status = INTEL_UC_FIRMWARE_NONE; > + huc_fw->load_status = INTEL_UC_FIRMWARE_NONE; > + } Maybe we should move this patch before 13/21 to better handle "skip_load_on_resume" case ? > +} > diff --git a/drivers/gpu/drm/i915/intel_uc.h > b/drivers/gpu/drm/i915/intel_uc.h > index f741ccc..fbae5d8 100644 > --- a/drivers/gpu/drm/i915/intel_uc.h > +++ b/drivers/gpu/drm/i915/intel_uc.h > @@ -37,5 +37,6 @@ > int intel_uc_suspend(struct drm_i915_private *dev_priv); > void intel_uc_resume(struct drm_i915_private *dev_priv); > void intel_uc_runtime_resume(struct drm_i915_private *dev_priv); > +void intel_uc_sanitize(struct drm_i915_private *dev_priv); > #endif
On 10/11/2017 11:00 PM, Michal Wajdeczko wrote: > On Wed, 11 Oct 2017 10:54:13 +0200, Sagar Arun Kamble > <sagar.a.kamble@intel.com> wrote: > >> In i915_reset/gem_sanitize, GPU will be reset and driver state about >> GuC/HuC load status will be invalid. Hence, we mark both GuC/HuC as not >> loaded/NONE. >> >> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> >> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >> Cc: Michał Winiarski <michal.winiarski@intel.com> >> Cc: Chris Wilson <chris@chris-wilson.co.uk> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> >> --- >> drivers/gpu/drm/i915/i915_gem.c | 4 ++++ >> drivers/gpu/drm/i915/intel_uc.c | 18 ++++++++++++++++++ >> drivers/gpu/drm/i915/intel_uc.h | 1 + >> 3 files changed, 23 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/i915_gem.c >> b/drivers/gpu/drm/i915/i915_gem.c >> index f1a785a..a4bbf6c 100644 >> --- a/drivers/gpu/drm/i915/i915_gem.c >> +++ b/drivers/gpu/drm/i915/i915_gem.c >> @@ -2954,6 +2954,8 @@ int i915_gem_reset_prepare(struct >> drm_i915_private *dev_priv) >> i915_gem_revoke_fences(dev_priv); >> + intel_uc_sanitize(dev_priv); >> + >> return err; >> } >> @@ -4636,6 +4638,8 @@ void i915_gem_sanitize(struct drm_i915_private >> *i915) >> mutex_unlock(&i915->drm.struct_mutex); >> } >> + intel_uc_sanitize(i915); >> + >> /* >> * If we inherit context state from the BIOS or earlier occupants >> * of the GPU, the GPU may be in an inconsistent state when we >> diff --git a/drivers/gpu/drm/i915/intel_uc.c >> b/drivers/gpu/drm/i915/intel_uc.c >> index 25acf8f..9010ab5 100644 >> --- a/drivers/gpu/drm/i915/intel_uc.c >> +++ b/drivers/gpu/drm/i915/intel_uc.c >> @@ -438,3 +438,21 @@ void intel_uc_runtime_resume(struct >> drm_i915_private *dev_priv) >> intel_uc_init_hw(dev_priv); >> } >> + >> +/** >> + * intel_uc_sanitize() - Sanitize uC state. >> + * @dev_priv: i915 device private >> + * >> + * This function marks load_status as FIRMWARE_NONE and sanitizes >> state of >> + * other GuC tasks. >> + */ >> +void intel_uc_sanitize(struct drm_i915_private *dev_priv) >> +{ >> + struct intel_uc_fw *guc_fw = &dev_priv->guc.fw; >> + struct intel_uc_fw *huc_fw = &dev_priv->huc.fw; > > nitpick: > > struct intel_guc *guc = &dev_priv->guc; > struct intel_huc *huc = &dev_priv->huc; Sure. will update uc_fw through these struct pointers. > >> + >> + if (i915_modparams.enable_guc_loading) { >> + guc_fw->load_status = INTEL_UC_FIRMWARE_NONE; >> + huc_fw->load_status = INTEL_UC_FIRMWARE_NONE; >> + } > > Maybe we should move this patch before 13/21 to better handle > "skip_load_on_resume" case ? yes. in v14 i have moved this patch earlier. > >> +} >> diff --git a/drivers/gpu/drm/i915/intel_uc.h >> b/drivers/gpu/drm/i915/intel_uc.h >> index f741ccc..fbae5d8 100644 >> --- a/drivers/gpu/drm/i915/intel_uc.h >> +++ b/drivers/gpu/drm/i915/intel_uc.h >> @@ -37,5 +37,6 @@ >> int intel_uc_suspend(struct drm_i915_private *dev_priv); >> void intel_uc_resume(struct drm_i915_private *dev_priv); >> void intel_uc_runtime_resume(struct drm_i915_private *dev_priv); >> +void intel_uc_sanitize(struct drm_i915_private *dev_priv); >> #endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index f1a785a..a4bbf6c 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2954,6 +2954,8 @@ int i915_gem_reset_prepare(struct drm_i915_private *dev_priv) i915_gem_revoke_fences(dev_priv); + intel_uc_sanitize(dev_priv); + return err; } @@ -4636,6 +4638,8 @@ void i915_gem_sanitize(struct drm_i915_private *i915) mutex_unlock(&i915->drm.struct_mutex); } + intel_uc_sanitize(i915); + /* * If we inherit context state from the BIOS or earlier occupants * of the GPU, the GPU may be in an inconsistent state when we diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 25acf8f..9010ab5 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -438,3 +438,21 @@ void intel_uc_runtime_resume(struct drm_i915_private *dev_priv) intel_uc_init_hw(dev_priv); } + +/** + * intel_uc_sanitize() - Sanitize uC state. + * @dev_priv: i915 device private + * + * This function marks load_status as FIRMWARE_NONE and sanitizes state of + * other GuC tasks. + */ +void intel_uc_sanitize(struct drm_i915_private *dev_priv) +{ + struct intel_uc_fw *guc_fw = &dev_priv->guc.fw; + struct intel_uc_fw *huc_fw = &dev_priv->huc.fw; + + if (i915_modparams.enable_guc_loading) { + guc_fw->load_status = INTEL_UC_FIRMWARE_NONE; + huc_fw->load_status = INTEL_UC_FIRMWARE_NONE; + } +} diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index f741ccc..fbae5d8 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -37,5 +37,6 @@ int intel_uc_suspend(struct drm_i915_private *dev_priv); void intel_uc_resume(struct drm_i915_private *dev_priv); void intel_uc_runtime_resume(struct drm_i915_private *dev_priv); +void intel_uc_sanitize(struct drm_i915_private *dev_priv); #endif
In i915_reset/gem_sanitize, GPU will be reset and driver state about GuC/HuC load status will be invalid. Hence, we mark both GuC/HuC as not loaded/NONE. Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- drivers/gpu/drm/i915/i915_gem.c | 4 ++++ drivers/gpu/drm/i915/intel_uc.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/intel_uc.h | 1 + 3 files changed, 23 insertions(+)