| Message ID | 1507447441-5422-9-git-send-email-yi.y.sun@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
>>> On 08.10.17 at 09:23, <yi.y.sun@linux.intel.com> wrote: > --- a/xen/arch/x86/psr.c > +++ b/xen/arch/x86/psr.c > @@ -138,6 +138,12 @@ static const struct feat_props { > > /* write_msr is used to write out feature MSR register. */ > void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type); > + > + /* > + * check_val is used to check if input val fulfills SDM requirement. > + * Change it to valid value if SDM allows. > + */ > + bool (*check_val)(const struct feat_node *feat, unsigned long *val); I'm pretty sure I've said so before - "check" to me implies all r/o inputs. Perhaps sanitize_val() or even just sanitize()? And why unsigned long when the only caller has a uint32_t in its hands? > @@ -274,30 +280,30 @@ static enum psr_feat_type psr_type_to_feat_type(enum psr_type type) > return feat_type; > } > > -static bool psr_check_cbm(unsigned int cbm_len, unsigned long cbm) > +/* Implementation of allocation features' functions. */ > +static bool cat_check_cbm(const struct feat_node *feat, unsigned long *cbm) > { > unsigned int first_bit, zero_bit; > + unsigned int cbm_len = feat->cat.cbm_len; > > - /* Set bits should only in the range of [0, cbm_len]. */ > - if ( cbm & (~0ul << cbm_len) ) > - return false; > - > - /* At least one bit need to be set. */ > - if ( cbm == 0 ) > + /* > + * Set bits should only in the range of [0, cbm_len]. As you alter the comment anyway, please also add the missing "be". Also - isn't the upper bound of the range exclusive, i.e. shouldn't this be [0, cbm_len)? > + * And, at least one bit need to be set. > + */ > + if ( *cbm & (~0ul << cbm_len) || *cbm == 0 ) Parentheses missing for the left side operand of || and if you omit != 0 on the left part (which I appreciate) please also use ! instead of == 0 on the right side. > +static bool mba_check_thrtl(const struct feat_node *feat, unsigned long *thrtl) > +{ > + if ( *thrtl > feat->mba.thrtl_max ) > + return false; > + > + /* > + * Per SDM (chapter "Memory Bandwidth Allocation Configuration"): > + * 1. Linear mode: In the linear mode the input precision is defined > + * as 100-(MBA_MAX). For instance, if the MBA_MAX value is 90, the > + * input precision is 10%. Values not an even multiple of the > + * precision (e.g., 12%) will be rounded down (e.g., to 10% delay > + * applied). > + * 2. Non-linear mode: Input delay values are powers-of-two from zero > + * to the MBA_MAX value from CPUID. In this case any values not a > + * power of two will be rounded down the next nearest power of two. > + */ > + if ( feat->mba.linear ) > + { > + unsigned int mod; > + > + if ( feat->mba.thrtl_max >= 100 ) > + return false; Don't you check this right after collecting CPUID output? If so, this should be at most an ASSERT(). > + mod = *thrtl % (100 - feat->mba.thrtl_max); > + *thrtl -= mod; Do you really need the intermediate variable? > + } > + else > + { > + /* Not power of 2. */ > + if ( *thrtl & (*thrtl - 1) ) > + *thrtl = *thrtl & (1 << (flsl(*thrtl) - 1)); &= or even simply =. > @@ -950,6 +997,7 @@ static int insert_val_into_array(uint32_t val[], > const struct feat_node *feat; > const struct feat_props *props; > unsigned int i; > + unsigned long check_val = new_val; > int ret; > > ASSERT(feat_type < FEAT_TYPE_NUM); > @@ -974,9 +1022,11 @@ static int insert_val_into_array(uint32_t val[], > if ( array_len < props->cos_num ) > return -ENOSPC; > > - if ( !psr_check_cbm(feat->cat.cbm_len, new_val) ) > + if ( !props->check_val(feat, &check_val) ) > return -EINVAL; > > + new_val = check_val; When the function pointer's parameter changes to uint32_t * you won't need the intermediate variable anymore afaict. Jan
On 17-10-11 07:38:52, Jan Beulich wrote: > >>> On 08.10.17 at 09:23, <yi.y.sun@linux.intel.com> wrote: > > --- a/xen/arch/x86/psr.c > > +++ b/xen/arch/x86/psr.c > > @@ -138,6 +138,12 @@ static const struct feat_props { > > > > /* write_msr is used to write out feature MSR register. */ > > void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type); > > + > > + /* > > + * check_val is used to check if input val fulfills SDM requirement. > > + * Change it to valid value if SDM allows. > > + */ > > + bool (*check_val)(const struct feat_node *feat, unsigned long *val); > > I'm pretty sure I've said so before - "check" to me implies all r/o > inputs. Perhaps sanitize_val() or even just sanitize()? > > And why unsigned long when the only caller has a uint32_t in its > hands? > To be compatible with cat_check_cbm (old name is 'psr_check_cbm' in L2 series), the last parameter type is 'unsigned long'. We have discussed it in L2 patch set v9, patch 10. > > @@ -274,30 +280,30 @@ static enum psr_feat_type psr_type_to_feat_type(enum psr_type type) > > return feat_type; > > } > > > > -static bool psr_check_cbm(unsigned int cbm_len, unsigned long cbm) > > +/* Implementation of allocation features' functions. */ > > +static bool cat_check_cbm(const struct feat_node *feat, unsigned long *cbm) > > { > > unsigned int first_bit, zero_bit; > > + unsigned int cbm_len = feat->cat.cbm_len; > > > > - /* Set bits should only in the range of [0, cbm_len]. */ > > - if ( cbm & (~0ul << cbm_len) ) > > - return false; > > - > > - /* At least one bit need to be set. */ > > - if ( cbm == 0 ) > > + /* > > + * Set bits should only in the range of [0, cbm_len]. > > As you alter the comment anyway, please also add the missing "be". > Also - isn't the upper bound of the range exclusive, i.e. shouldn't > this be [0, cbm_len)? > Thanks! > > + * And, at least one bit need to be set. > > + */ > > + if ( *cbm & (~0ul << cbm_len) || *cbm == 0 ) > > Parentheses missing for the left side operand of || and if you omit > != 0 on the left part (which I appreciate) please also use ! instead > of == 0 on the right side. > Got it. > > +static bool mba_check_thrtl(const struct feat_node *feat, unsigned long *thrtl) > > +{ > > + if ( *thrtl > feat->mba.thrtl_max ) > > + return false; > > + > > + /* > > + * Per SDM (chapter "Memory Bandwidth Allocation Configuration"): > > + * 1. Linear mode: In the linear mode the input precision is defined > > + * as 100-(MBA_MAX). For instance, if the MBA_MAX value is 90, the > > + * input precision is 10%. Values not an even multiple of the > > + * precision (e.g., 12%) will be rounded down (e.g., to 10% delay > > + * applied). > > + * 2. Non-linear mode: Input delay values are powers-of-two from zero > > + * to the MBA_MAX value from CPUID. In this case any values not a > > + * power of two will be rounded down the next nearest power of two. > > + */ > > + if ( feat->mba.linear ) > > + { > > + unsigned int mod; > > + > > + if ( feat->mba.thrtl_max >= 100 ) > > + return false; > > Don't you check this right after collecting CPUID output? If so, > this should be at most an ASSERT(). > Yes, I have checked this in mba_init_feature. Will remove this check. > > + mod = *thrtl % (100 - feat->mba.thrtl_max); > > + *thrtl -= mod; > > Do you really need the intermediate variable? > Will remove 'mod'. > > + } > > + else > > + { > > + /* Not power of 2. */ > > + if ( *thrtl & (*thrtl - 1) ) > > + *thrtl = *thrtl & (1 << (flsl(*thrtl) - 1)); > > &= or even simply =. > Ok, thanks! > > @@ -950,6 +997,7 @@ static int insert_val_into_array(uint32_t val[], > > const struct feat_node *feat; > > const struct feat_props *props; > > unsigned int i; > > + unsigned long check_val = new_val; > > int ret; > > > > ASSERT(feat_type < FEAT_TYPE_NUM); > > @@ -974,9 +1022,11 @@ static int insert_val_into_array(uint32_t val[], > > if ( array_len < props->cos_num ) > > return -ENOSPC; > > > > - if ( !psr_check_cbm(feat->cat.cbm_len, new_val) ) > > + if ( !props->check_val(feat, &check_val) ) > > return -EINVAL; > > > > + new_val = check_val; > > When the function pointer's parameter changes to uint32_t * > you won't need the intermediate variable anymore afaict. > > Jan
>>> On 12.10.17 at 06:33, <yi.y.sun@linux.intel.com> wrote: > On 17-10-11 07:38:52, Jan Beulich wrote: >> >>> On 08.10.17 at 09:23, <yi.y.sun@linux.intel.com> wrote: >> > --- a/xen/arch/x86/psr.c >> > +++ b/xen/arch/x86/psr.c >> > @@ -138,6 +138,12 @@ static const struct feat_props { >> > >> > /* write_msr is used to write out feature MSR register. */ >> > void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type); >> > + >> > + /* >> > + * check_val is used to check if input val fulfills SDM requirement. >> > + * Change it to valid value if SDM allows. >> > + */ >> > + bool (*check_val)(const struct feat_node *feat, unsigned long *val); >> >> I'm pretty sure I've said so before - "check" to me implies all r/o >> inputs. Perhaps sanitize_val() or even just sanitize()? >> >> And why unsigned long when the only caller has a uint32_t in its >> hands? >> > To be compatible with cat_check_cbm (old name is 'psr_check_cbm' in L2 series), > the last parameter type is 'unsigned long'. We have discussed it in L2 patch set > v9, patch 10. Iirc (without checking the old thread) this was for calculations to be done as unsigned long ones. If that's the only aspect here, then imo this is not a valid reason for the hook's parameter type to be unsigned long *. Jan
On 17-10-12 03:43:26, Jan Beulich wrote: > >>> On 12.10.17 at 06:33, <yi.y.sun@linux.intel.com> wrote: > > On 17-10-11 07:38:52, Jan Beulich wrote: > >> >>> On 08.10.17 at 09:23, <yi.y.sun@linux.intel.com> wrote: > >> > --- a/xen/arch/x86/psr.c > >> > +++ b/xen/arch/x86/psr.c > >> > @@ -138,6 +138,12 @@ static const struct feat_props { > >> > > >> > /* write_msr is used to write out feature MSR register. */ > >> > void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type); > >> > + > >> > + /* > >> > + * check_val is used to check if input val fulfills SDM requirement. > >> > + * Change it to valid value if SDM allows. > >> > + */ > >> > + bool (*check_val)(const struct feat_node *feat, unsigned long *val); > >> > >> I'm pretty sure I've said so before - "check" to me implies all r/o > >> inputs. Perhaps sanitize_val() or even just sanitize()? > >> > >> And why unsigned long when the only caller has a uint32_t in its > >> hands? > >> > > To be compatible with cat_check_cbm (old name is 'psr_check_cbm' in L2 series), > > the last parameter type is 'unsigned long'. We have discussed it in L2 patch set > > v9, patch 10. > > Iirc (without checking the old thread) this was for calculations to > be done as unsigned long ones. If that's the only aspect here, > then imo this is not a valid reason for the hook's parameter type > to be unsigned long *. > Because below macros used in cat_check_cbm require the input addr to be unsigned long, we define the last parameter of cat_check_cbm to be unsigned long. find_first_bit find_next_zero_bit find_next_bit If you think the unsigned long is not appropriate for 'check_val', I think I have to define a local variable in cat_check_cbm to do the convertion. > Jan
>>> On 13.10.17 at 04:02, <yi.y.sun@linux.intel.com> wrote: > On 17-10-12 03:43:26, Jan Beulich wrote: >> >>> On 12.10.17 at 06:33, <yi.y.sun@linux.intel.com> wrote: >> > On 17-10-11 07:38:52, Jan Beulich wrote: >> >> >>> On 08.10.17 at 09:23, <yi.y.sun@linux.intel.com> wrote: >> >> > --- a/xen/arch/x86/psr.c >> >> > +++ b/xen/arch/x86/psr.c >> >> > @@ -138,6 +138,12 @@ static const struct feat_props { >> >> > >> >> > /* write_msr is used to write out feature MSR register. */ >> >> > void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type); >> >> > + >> >> > + /* >> >> > + * check_val is used to check if input val fulfills SDM requirement. >> >> > + * Change it to valid value if SDM allows. >> >> > + */ >> >> > + bool (*check_val)(const struct feat_node *feat, unsigned long *val); >> >> >> >> I'm pretty sure I've said so before - "check" to me implies all r/o >> >> inputs. Perhaps sanitize_val() or even just sanitize()? >> >> >> >> And why unsigned long when the only caller has a uint32_t in its >> >> hands? >> >> >> > To be compatible with cat_check_cbm (old name is 'psr_check_cbm' in L2 series), >> > the last parameter type is 'unsigned long'. We have discussed it in L2 patch set >> > v9, patch 10. >> >> Iirc (without checking the old thread) this was for calculations to >> be done as unsigned long ones. If that's the only aspect here, >> then imo this is not a valid reason for the hook's parameter type >> to be unsigned long *. >> > Because below macros used in cat_check_cbm require the input addr to be > unsigned > long, we define the last parameter of cat_check_cbm to be unsigned long. > find_first_bit > find_next_zero_bit > find_next_bit > > If you think the unsigned long is not appropriate for 'check_val', I think I > have to define a local variable in cat_check_cbm to do the convertion. Exactly - the use of unsigned long is specific to this function, not generic for all implementations of the hook. The parameter type change back then was only a simple way to avoid defining another local variable. Jan
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 17fd3ad..bbfd76e 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -1475,6 +1475,12 @@ long arch_do_domctl( PSR_TYPE_L2_CBM); break; + case XEN_DOMCTL_PSR_SET_MBA_THRTL: + ret = psr_set_val(d, domctl->u.psr_alloc.target, + domctl->u.psr_alloc.data, + PSR_TYPE_MBA_THRTL); + break; + case XEN_DOMCTL_PSR_GET_L3_CBM: ret = domctl_psr_get_val(d, domctl, PSR_TYPE_L3_CBM, copyback); break; diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index 03f24c0..cffb377 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -138,6 +138,12 @@ static const struct feat_props { /* write_msr is used to write out feature MSR register. */ void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type); + + /* + * check_val is used to check if input val fulfills SDM requirement. + * Change it to valid value if SDM allows. + */ + bool (*check_val)(const struct feat_node *feat, unsigned long *val); } *feat_props[FEAT_TYPE_NUM]; /* @@ -274,30 +280,30 @@ static enum psr_feat_type psr_type_to_feat_type(enum psr_type type) return feat_type; } -static bool psr_check_cbm(unsigned int cbm_len, unsigned long cbm) +/* Implementation of allocation features' functions. */ +static bool cat_check_cbm(const struct feat_node *feat, unsigned long *cbm) { unsigned int first_bit, zero_bit; + unsigned int cbm_len = feat->cat.cbm_len; - /* Set bits should only in the range of [0, cbm_len]. */ - if ( cbm & (~0ul << cbm_len) ) - return false; - - /* At least one bit need to be set. */ - if ( cbm == 0 ) + /* + * Set bits should only in the range of [0, cbm_len]. + * And, at least one bit need to be set. + */ + if ( *cbm & (~0ul << cbm_len) || *cbm == 0 ) return false; - first_bit = find_first_bit(&cbm, cbm_len); - zero_bit = find_next_zero_bit(&cbm, cbm_len, first_bit); + first_bit = find_first_bit(cbm, cbm_len); + zero_bit = find_next_zero_bit(cbm, cbm_len, first_bit); /* Set bits should be contiguous. */ if ( zero_bit < cbm_len && - find_next_bit(&cbm, cbm_len, zero_bit) < cbm_len ) + find_next_bit(cbm, cbm_len, zero_bit) < cbm_len ) return false; return true; } -/* Implementation of allocation features' functions. */ static bool cat_init_feature(const struct cpuid_leaf *regs, struct feat_node *feat, struct psr_socket_info *info, @@ -436,6 +442,7 @@ static const struct feat_props l3_cat_props = { .alt_type = PSR_TYPE_UNKNOWN, .get_feat_info = cat_get_feat_info, .write_msr = l3_cat_write_msr, + .check_val = cat_check_cbm, }; /* L3 CDP props */ @@ -466,6 +473,7 @@ static const struct feat_props l3_cdp_props = { .alt_type = PSR_TYPE_L3_CBM, .get_feat_info = l3_cdp_get_feat_info, .write_msr = l3_cdp_write_msr, + .check_val = cat_check_cbm, }; /* L2 CAT props */ @@ -481,6 +489,7 @@ static const struct feat_props l2_cat_props = { .alt_type = PSR_TYPE_UNKNOWN, .get_feat_info = cat_get_feat_info, .write_msr = l2_cat_write_msr, + .check_val = cat_check_cbm, }; /* MBA props */ @@ -501,6 +510,43 @@ static bool mba_get_feat_info(const struct feat_node *feat, static void mba_write_msr(unsigned int cos, uint32_t val, enum psr_type type) { + wrmsrl(MSR_IA32_PSR_MBA_MASK(cos), val); +} + +static bool mba_check_thrtl(const struct feat_node *feat, unsigned long *thrtl) +{ + if ( *thrtl > feat->mba.thrtl_max ) + return false; + + /* + * Per SDM (chapter "Memory Bandwidth Allocation Configuration"): + * 1. Linear mode: In the linear mode the input precision is defined + * as 100-(MBA_MAX). For instance, if the MBA_MAX value is 90, the + * input precision is 10%. Values not an even multiple of the + * precision (e.g., 12%) will be rounded down (e.g., to 10% delay + * applied). + * 2. Non-linear mode: Input delay values are powers-of-two from zero + * to the MBA_MAX value from CPUID. In this case any values not a + * power of two will be rounded down the next nearest power of two. + */ + if ( feat->mba.linear ) + { + unsigned int mod; + + if ( feat->mba.thrtl_max >= 100 ) + return false; + + mod = *thrtl % (100 - feat->mba.thrtl_max); + *thrtl -= mod; + } + else + { + /* Not power of 2. */ + if ( *thrtl & (*thrtl - 1) ) + *thrtl = *thrtl & (1 << (flsl(*thrtl) - 1)); + } + + return true; } static const struct feat_props mba_props = { @@ -509,6 +555,7 @@ static const struct feat_props mba_props = { .alt_type = PSR_TYPE_UNKNOWN, .get_feat_info = mba_get_feat_info, .write_msr = mba_write_msr, + .check_val = mba_check_thrtl, }; static bool __init parse_psr_bool(const char *s, const char *delim, @@ -950,6 +997,7 @@ static int insert_val_into_array(uint32_t val[], const struct feat_node *feat; const struct feat_props *props; unsigned int i; + unsigned long check_val = new_val; int ret; ASSERT(feat_type < FEAT_TYPE_NUM); @@ -974,9 +1022,11 @@ static int insert_val_into_array(uint32_t val[], if ( array_len < props->cos_num ) return -ENOSPC; - if ( !psr_check_cbm(feat->cat.cbm_len, new_val) ) + if ( !props->check_val(feat, &check_val) ) return -EINVAL; + new_val = check_val; + /* * Value setting position is same as feature array. * For CDP, user may set both DATA and CODE to same value. For such case, diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index e8f4c4c..fb57e64 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -1069,6 +1069,7 @@ struct xen_domctl_psr_alloc { #define XEN_DOMCTL_PSR_GET_L3_DATA 5 #define XEN_DOMCTL_PSR_SET_L2_CBM 6 #define XEN_DOMCTL_PSR_GET_L2_CBM 7 +#define XEN_DOMCTL_PSR_SET_MBA_THRTL 8 #define XEN_DOMCTL_PSR_GET_MBA_THRTL 9 uint32_t cmd; /* IN: XEN_DOMCTL_PSR_* */ uint32_t target; /* IN */
This patch implements set value flow for MBA including its callback function and domctl interface. Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com> --- CC: Jan Beulich <jbeulich@suse.com> CC: Andrew Cooper <andrew.cooper3@citrix.com> CC: Wei Liu <wei.liu2@citrix.com> CC: Roger Pau Monné <roger.pau@citrix.com> CC: Chao Peng <chao.p.peng@linux.intel.com> v6: - split co-exist features' values setting flow to a new patch. (suggested by Jan Beulich) - restore codes related to 'mba_check_thrtl' and 'check_value'. (suggested by Jan Beulich) v5: - adjust position of 'cat_check_cbm' to not to make changes so big. (suggested by Roger Pau Monné) - remove 'props' from 'struct cos_write_info'. (suggested by Roger Pau Monné) - make a single return statement in 'mba_check_thrtl'. (suggested by Jan Beulich) v4: - remove 'ALLOC_' from macro names. (suggested by Roger Pau Monné) - join two checks into a single if. (suggested by Roger Pau Monné) - remove redundant local variable 'array_len'. (suggested by Roger Pau Monné) v3: - modify commit message to make it clear. (suggested by Roger Pau Monné) - modify functionality of 'check_val' to make it simple to only check value. Change the last parameter type from 'unsigned long *' to 'unsigned long'. (suggested by Roger Pau Monné) - call rdmsrl to get value just written into MSR for MBA. Because HW can automatically change input value to what it wants. (suggested by Roger Pau Monné) - change type of 'write_msr' to 'uint32_t' to return the value actually written into MSR. Then, change 'do_write_psr_msrs' to set the returned value into 'cos_reg_val[]' - move the declaration of 'j' into loop in 'do_write_psr_msrs'. (suggested by Roger Pau Monné) - change 'mba_info' to 'mba'. (suggested by Roger Pau Monné) - change 'cat_info' to 'cat'. (suggested by Roger Pau Monné) - rename 'psr_cat/PSR_CAT' to 'psr_alloc/PSR_ALLOC' and remove 'op/OP' from name. (suggested by Roger Pau Monné) - change 'PSR_VAL_TYPE_MBA' to 'PSR_TYPE_MBA_THRTL'. (suggested by Roger Pau Monné) v2: - remove linear mode 'thrtl_max' check in 'mba_check_thrtl' because it has been checked in 'mba_init_feature'. (suggested by Chao Peng) - for non-linear mode, check if '*thrtl' is not 0 in 'mba_check_thrtl'. If it is 0, we do not need to change it. (suggested by Chao Peng) - move comments to explain changes of 'cos_write_info' from psr.c to commit message. (suggested by Chao Peng) --- xen/arch/x86/domctl.c | 6 ++++ xen/arch/x86/psr.c | 74 +++++++++++++++++++++++++++++++++++++-------- xen/include/public/domctl.h | 1 + 3 files changed, 69 insertions(+), 12 deletions(-)