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[3/5] ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

Message ID 20171117080236.32504-4-yixun.lan@amlogic.com (mailing list archive)
State Superseded
Headers show

Commit Message

Yixun Lan Nov. 17, 2017, 8:02 a.m. UTC
From: Jian Hu <jian.hu@amlogic.com>

There are four I2C masters in EE domain, and one I2C Master in
AO domain, the DT info here should describe them all.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 59 ++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

Comments

Neil Armstrong Nov. 17, 2017, 1:05 p.m. UTC | #1
Hi Yixun, Jian,

On 17/11/2017 09:02, Yixun Lan wrote:
> From: Jian Hu <jian.hu@amlogic.com>
> 
> There are four I2C masters in EE domain, and one I2C Master in
> AO domain, the DT info here should describe them all.
> 
> Signed-off-by: Jian Hu <jian.hu@amlogic.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 59 ++++++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index 57faaa9d8013..99e967aff439 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -129,6 +129,54 @@
>  				#reset-cells = <1>;
>  			};
>  
> +			i2c_m0: i2c@1f000 {

Can you use a more simple "i2c0" phandle naming instead ? or get back to the "i2c_A/B/C/D" naming like in meson_gx to keep consistency ?

[...]

> +			};
> +
> +			i2c_m1: i2c@1e000 {

[...]

> +			};
> +
> +			i2c_m2: i2c@1d000 {

[...]

> +			};
> +
> +			i2c_m3: i2c@1c000 {

[...]

> +			};
> +
>  			uart_A: serial@24000 {
>  				compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
>  				reg = <0x0 0x24000 0x0 0x14>;
> @@ -312,6 +360,17 @@
>  				};
>  			};
>  
> +			i2c_ao: i2c@5000 {

Can you keep the same "i2c_AO" as in meson-gx ?


[...]

> +			};
> +
>  			uart_AO: serial@3000 {
>  				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
>  				reg = <0x0 0x3000 0x0 0x18>;
> 

Neil
Yixun Lan Nov. 17, 2017, 2:02 p.m. UTC | #2
Hi Neil

see my comments in line

On 11/17/17 21:05, Neil Armstrong wrote:
> Hi Yixun, Jian,
> 
> On 17/11/2017 09:02, Yixun Lan wrote:
>> From: Jian Hu <jian.hu@amlogic.com>
>>
>> There are four I2C masters in EE domain, and one I2C Master in
>> AO domain, the DT info here should describe them all.
>>
>> Signed-off-by: Jian Hu <jian.hu@amlogic.com>
>> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
>> ---
>>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 59 ++++++++++++++++++++++++++++++
>>  1 file changed, 59 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> index 57faaa9d8013..99e967aff439 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> @@ -129,6 +129,54 @@
>>  				#reset-cells = <1>;
>>  			};
>>  
>> +			i2c_m0: i2c@1f000 {
> 
> Can you use a more simple "i2c0" phandle naming instead ? or get back to the "i2c_A/B/C/D" naming like in meson_gx to keep consistency ?
> 
Ok, I would prefer to use 'i2c0' then

we had a internal discussion about the inconsistent naming of the I2C
controller, and reach a consensus to name them as:
 the EE domain: ee_i2c_m0, ee_i2c_m1 ..
 the AO domain: ao_i2c_m0, ao_i2c_s0
in the future datasheet.

note: 'ee' means the EE domain, m0 mean the master 0, s0 mean the I2C
slave 0


> [...]
> 
>> +			};
>> +
>> +			i2c_m1: i2c@1e000 {
> 
> [...]
> 
>> +			};
>> +
>> +			i2c_m2: i2c@1d000 {
> 
> [...]
> 
>> +			};
>> +
>> +			i2c_m3: i2c@1c000 {
> 
> [...]
> 
>> +			};
>> +
>>  			uart_A: serial@24000 {
>>  				compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
>>  				reg = <0x0 0x24000 0x0 0x14>;
>> @@ -312,6 +360,17 @@
>>  				};
>>  			};
>>  
>> +			i2c_ao: i2c@5000 {
> 
> Can you keep the same "i2c_AO" as in meson-gx ?
> 
> 
sure, can do

> [...]
> 
>> +			};
>> +
>>  			uart_AO: serial@3000 {
>>  				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
>>  				reg = <0x0 0x3000 0x0 0x18>;
>>
> 
> Neil
> 
> .
>
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 57faaa9d8013..99e967aff439 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -129,6 +129,54 @@ 
 				#reset-cells = <1>;
 			};
 
+			i2c_m0: i2c@1f000 {
+				compatible = "amlogic,meson-axg-i2c";
+				status = "disabled";
+				reg = <0x0 0x1f000 0x0 0x20>;
+				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
+			i2c_m1: i2c@1e000 {
+				compatible = "amlogic,meson-axg-i2c";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x0 0x1e000 0x0 0x20>;
+				status = "disabled";
+				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
+			i2c_m2: i2c@1d000 {
+				compatible = "amlogic,meson-axg-i2c";
+				status = "disabled";
+				reg = <0x0 0x1d000 0x0 0x20>;
+				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
+			i2c_m3: i2c@1c000 {
+				compatible = "amlogic,meson-axg-i2c";
+				status = "disabled";
+				reg = <0x0 0x1c000 0x0 0x20>;
+				interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+					<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
 			uart_A: serial@24000 {
 				compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
 				reg = <0x0 0x24000 0x0 0x14>;
@@ -312,6 +360,17 @@ 
 				};
 			};
 
+			i2c_ao: i2c@5000 {
+				compatible = "amlogic,meson-axg-i2c";
+				status = "disabled";
+				reg = <0x0 0x05000 0x0 0x20>;
+				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&clkc CLKID_I2C>;
+				clock-names = "clk_i2c";
+			};
+
 			uart_AO: serial@3000 {
 				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
 				reg = <0x0 0x3000 0x0 0x18>;