| Message ID | 20171204060018.8856-4-yixun.lan@amlogic.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
On Mon, 2017-12-04 at 14:00 +0800, Yixun Lan wrote: > From: Jian Hu <jian.hu@amlogic.com> > > Add PWM DT info for the Amlogic's Meson-Axg SoC. > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 120 > +++++++++++++++++++++++++++++ > 1 file changed, 120 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index 92f65eec3e18..f7f228701df1 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -177,6 +177,24 @@ > [...] > > @@ -435,6 +537,24 @@ > clock-names = "clk_i2c"; > }; > > + pwm_AO_ab: pwm@7000 { > + compatible = "amlogic,meson-axg-ao-pwm"; > + reg = <0x0 0x07000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; like gxbb, "amlogic,meson-axg-ao-pwm" does not have such clock bindings, Later on, if we want to "correctly" get the clock from DT, it will have to gothrough a new compatible, I guess. > + status = "disabled"; > + }; > + > + pwm_AO_cd: pwm@2000 { > + compatible = "amlogic,axg-ao-pwm"; > + reg = <0x0 0x02000 0x0 0x20>; > + #pwm-cells = <3>; > + clocks = <&xtal>, <&xtal>; > + clock-names = "clkin0", "clkin1"; > + status = "disabled"; > + }; > + > uart_AO: serial@3000 { > compatible = "amlogic,meson-gx-uart", > "amlogic,meson-ao-uart"; > reg = <0x0 0x3000 0x0 0x18>;
On Mon, 2017-12-04 at 10:17 +0100, Jerome Brunet wrote: > On Mon, 2017-12-04 at 14:00 +0800, Yixun Lan wrote: > > From: Jian Hu <jian.hu@amlogic.com> > > > > Add PWM DT info for the Amlogic's Meson-Axg SoC. > > > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> > > --- > > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 120 > > +++++++++++++++++++++++++++++ > > 1 file changed, 120 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > > b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > > index 92f65eec3e18..f7f228701df1 100644 > > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > > @@ -177,6 +177,24 @@ > > > > [...] > > > > > @@ -435,6 +537,24 @@ > > clock-names = "clk_i2c"; > > }; > > > > + pwm_AO_ab: pwm@7000 { > > + compatible = "amlogic,meson-axg-ao-pwm"; > > + reg = <0x0 0x07000 0x0 0x20>; > > + #pwm-cells = <3>; > > + clocks = <&xtal>, <&xtal>; > > + clock-names = "clkin0", "clkin1"; > > like gxbb, "amlogic,meson-axg-ao-pwm" does not have such clock bindings, > Later on, if we want to "correctly" get the clock from DT, it will have to > gothrough a new compatible, I guess. Please ignore this comment (monday morning...) However clock bindings for this should be defined in the board dts, not the soc one > > > + status = "disabled"; > > + }; > > + > > + pwm_AO_cd: pwm@2000 { > > + compatible = "amlogic,axg-ao-pwm"; > > + reg = <0x0 0x02000 0x0 0x20>; > > + #pwm-cells = <3>; > > + clocks = <&xtal>, <&xtal>; > > + clock-names = "clkin0", "clkin1"; > > + status = "disabled"; > > + }; > > + > > uart_AO: serial@3000 { > > compatible = "amlogic,meson-gx-uart", > > "amlogic,meson-ao-uart"; > > reg = <0x0 0x3000 0x0 0x18>; > >
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 92f65eec3e18..f7f228701df1 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -177,6 +177,24 @@ clock-names = "clk_i2c"; }; + pwm_ab: pwm@1b000 { + compatible = "amlogic,meson-axg-ee-pwm"; + reg = <0x0 0x1b000 0x0 0x20>; + #pwm-cells = <3>; + clocks = <&xtal>, <&xtal>; + clock-names = "clkin0", "clkin1"; + status = "disabled"; + }; + + pwm_cd: pwm@1a000 { + compatible = "amlogic,meson-axg-ee-pwm"; + reg = <0x0 0x1a000 0x0 0x20>; + #pwm-cells = <3>; + clocks = <&xtal>, <&xtal>; + clock-names = "clkin0", "clkin1"; + status = "disabled"; + }; + uart_A: serial@24000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; reg = <0x0 0x24000 0x0 0x14>; @@ -368,6 +386,90 @@ function = "i2c3"; }; }; + + pwm_a_a_pins: pwm_a_a { + mux { + groups = "pwm_a_a"; + function = "pwm_a"; + }; + }; + + pwm_a_x18_pins: pwm_a_x18 { + mux { + groups = "pwm_a_x18"; + function = "pwm_a"; + }; + }; + + pwm_a_x20_pins: pwm_a_x20 { + mux { + groups = "pwm_a_x20"; + function = "pwm_a"; + }; + }; + + pwm_a_z_pins: pwm_a_z { + mux { + groups = "pwm_a_z"; + function = "pwm_a"; + }; + }; + + pwm_b_a_pins: pwm_b_a { + mux { + groups = "pwm_b_a"; + function = "pwm_b"; + }; + }; + + pwm_b_x_pins: pwm_b_x { + mux { + groups = "pwm_b_x"; + function = "pwm_b"; + }; + }; + + pwm_b_z_pins: pwm_b_z { + mux { + groups = "pwm_b_z"; + function = "pwm_b"; + }; + }; + + pwm_c_a_pins: pwm_c_a { + mux { + groups = "pwm_c_a"; + function = "pwm_c"; + }; + }; + + pwm_c_x10_pins: pwm_c_x10 { + mux { + groups = "pwm_c_x10"; + function = "pwm_c"; + }; + }; + + pwm_c_x17_pins: pwm_c_x17 { + mux { + groups = "pwm_c_x17"; + function = "pwm_c"; + }; + }; + + pwm_d_x11_pins: pwm_d_x11 { + mux { + groups = "pwm_d_x11"; + function = "pwm_d"; + }; + }; + + pwm_d_x16_pins: pwm_d_x16 { + mux { + groups = "pwm_d_x16"; + function = "pwm_d"; + }; + }; }; }; @@ -435,6 +537,24 @@ clock-names = "clk_i2c"; }; + pwm_AO_ab: pwm@7000 { + compatible = "amlogic,meson-axg-ao-pwm"; + reg = <0x0 0x07000 0x0 0x20>; + #pwm-cells = <3>; + clocks = <&xtal>, <&xtal>; + clock-names = "clkin0", "clkin1"; + status = "disabled"; + }; + + pwm_AO_cd: pwm@2000 { + compatible = "amlogic,axg-ao-pwm"; + reg = <0x0 0x02000 0x0 0x20>; + #pwm-cells = <3>; + clocks = <&xtal>, <&xtal>; + clock-names = "clkin0", "clkin1"; + status = "disabled"; + }; + uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>;