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[v3,4/5] drm/i915/guc: Add WOPCM partitioning support for CNL

Message ID 1512769312-21993-4-git-send-email-yaodong.li@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jackie Li Dec. 8, 2017, 9:41 p.m. UTC
CNL has different WOPCM size and hardware restriction on GuC
WOPCM size.

This patch returns the correct WOPCM reserved size on CNL and
adds the GuC WOPCM size check for CNL.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Jackie Li <yaodong.li@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_wopcm.c | 21 +++++++++++++++++++++
 drivers/gpu/drm/i915/intel_guc_wopcm.h |  3 +++
 2 files changed, 24 insertions(+)

Comments

Chris Wilson Dec. 8, 2017, 11:03 p.m. UTC | #1
Quoting Jackie Li (2017-12-08 21:41:51)
> +static inline int cnl_a0_wopcm_size_check(struct drm_i915_private *i915)
> +{
> +       struct intel_guc_wopcm *wopcm = &i915->guc.wopcm;
> +       u32 huc_size = intel_uc_fw_get_size(&i915->huc.fw);
> +
> +       /*
> +        * On CNL A0, hardware requires guc size to be larger than or equal to
> +        * HuC kernel size.
> +        */

I couldn't find anything that told me that wopcm->size had to be greater
than GEN10_GUC_WOPCM_OFFSET. Either that is always true by construction,
in which case GEM_BUG_ON() here, or it may be too small in which case
add the test.

> +       if ((wopcm->size - GEN10_GUC_WOPCM_OFFSET) < huc_size)

((((Do) you) like) brackets)?
-Chris
Jackie Li Dec. 12, 2017, 12:16 a.m. UTC | #2
On 12/08/2017 03:03 PM, Chris Wilson wrote:
> Quoting Jackie Li (2017-12-08 21:41:51)
>> +static inline int cnl_a0_wopcm_size_check(struct drm_i915_private *i915)
>> +{
>> +       struct intel_guc_wopcm *wopcm = &i915->guc.wopcm;
>> +       u32 huc_size = intel_uc_fw_get_size(&i915->huc.fw);
>> +
>> +       /*
>> +        * On CNL A0, hardware requires guc size to be larger than or equal to
>> +        * HuC kernel size.
>> +        */
> I couldn't find anything that told me that wopcm->size had to be greater
> than GEN10_GUC_WOPCM_OFFSET. Either that is always true by construction,
> in which case GEM_BUG_ON() here, or it may be too small in which case
> add the test.
It's a known HW limitation on CNL A0. And Yes, it should be unlikely to 
happen,
but once it happened, we only want to disable GuC loading and submission.
>> +       if ((wopcm->size - GEN10_GUC_WOPCM_OFFSET) < huc_size)
> ((((Do) you) like) brackets)?
Will Fix it. :-) Thanks!
> -Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.c b/drivers/gpu/drm/i915/intel_guc_wopcm.c
index 61faf8f..b5d5501 100644
--- a/drivers/gpu/drm/i915/intel_guc_wopcm.c
+++ b/drivers/gpu/drm/i915/intel_guc_wopcm.c
@@ -33,6 +33,9 @@  static inline u32 guc_reserved_wopcm_size(struct intel_guc *guc)
 	if (IS_GEN9_LP(i915))
 		return BXT_WOPCM_RC6_RESERVED;
 
+	if (IS_GEN10(i915))
+		return CNL_WOPCM_RESERVED;
+
 	return 0;
 }
 
@@ -58,6 +61,21 @@  static inline int gen9_wocpm_size_check(struct drm_i915_private *i915)
 	return 0;
 }
 
+static inline int cnl_a0_wopcm_size_check(struct drm_i915_private *i915)
+{
+	struct intel_guc_wopcm *wopcm = &i915->guc.wopcm;
+	u32 huc_size = intel_uc_fw_get_size(&i915->huc.fw);
+
+	/*
+	 * On CNL A0, hardware requires guc size to be larger than or equal to
+	 * HuC kernel size.
+	 */
+	if ((wopcm->size - GEN10_GUC_WOPCM_OFFSET) < huc_size)
+		return -E2BIG;
+
+	return 0;
+}
+
 static inline int guc_wopcm_size_check(struct intel_guc *guc)
 {
 	struct drm_i915_private *i915 = guc_to_i915(guc);
@@ -65,6 +83,9 @@  static inline int guc_wopcm_size_check(struct intel_guc *guc)
 	if (IS_GEN9(i915))
 		return gen9_wocpm_size_check(i915);
 
+	if (IS_CNL_REVID(i915, CNL_REVID_A0, CNL_REVID_A0))
+		return cnl_a0_wopcm_size_check(i915);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_guc_wopcm.h b/drivers/gpu/drm/i915/intel_guc_wopcm.h
index cabf005..63fa237 100644
--- a/drivers/gpu/drm/i915/intel_guc_wopcm.h
+++ b/drivers/gpu/drm/i915/intel_guc_wopcm.h
@@ -39,9 +39,12 @@  struct intel_guc;
 #define GUC_WOPCM_STACK_RESERVED	(0x2000)
 /* 24KB WOPCM reserved for RC6 CTX on BXT */
 #define BXT_WOPCM_RC6_RESERVED		(0x6000)
+/* 36KB WOPCM reserved on CNL */
+#define CNL_WOPCM_RESERVED		(0x9000)
 
 #define GEN9_GUC_WOPCM_DELTA		4
 #define GEN9_GUC_WOPCM_OFFSET		(0x24000)
+#define GEN10_GUC_WOPCM_OFFSET		(0x4000)
 
 struct intel_guc_wopcm {
 	u32 offset;