| Message ID | 1513157116-9209-1-git-send-email-mika.kahola@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Dec 13, 2017 at 09:25:16AM +0000, Mika Kahola wrote: > crtc_mask is defined explicitly defined for a certain number of pipes per > platform. Let's generalize this in a way that crtc_mask dependens only on > the number of pipes defined in device info. > > v2: Use BIT() macro wherever possible (Ville) > Drop generalization for all other connectors except DDI (Ville) > Fix DP-MST crtc mask to be dependent only on pipe (Ville) > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > --- > drivers/gpu/drm/i915/intel_crt.c | 4 ++-- > drivers/gpu/drm/i915/intel_ddi.c | 6 +++++- > drivers/gpu/drm/i915/intel_dp.c | 6 +++--- > drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- > drivers/gpu/drm/i915/intel_dvo.c | 2 +- > drivers/gpu/drm/i915/intel_hdmi.c | 6 +++--- > drivers/gpu/drm/i915/intel_lvds.c | 6 +++--- > drivers/gpu/drm/i915/intel_sdvo.c | 2 +- > drivers/gpu/drm/i915/intel_tv.c | 4 ++-- > 9 files changed, 21 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c > index 9f31aea..9557e6e 100644 > --- a/drivers/gpu/drm/i915/intel_crt.c > +++ b/drivers/gpu/drm/i915/intel_crt.c > @@ -951,9 +951,9 @@ void intel_crt_init(struct drm_i915_private *dev_priv) > crt->base.type = INTEL_OUTPUT_ANALOG; > crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI); > if (IS_I830(dev_priv)) > - crt->base.crtc_mask = (1 << 0); > + crt->base.crtc_mask = BIT(PIPE_A); > else > - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > + crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); if bit represents the pipe, why not to use for_each_pipe, like you did bellow, everywhere else? (random, maybe nonsense thought: maybe we end up even removing some of if/else?!) > > if (IS_GEN2(dev_priv)) > connector->interlace_allowed = 0; > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index 369f780..581a8b3 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2767,6 +2767,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) > struct drm_encoder *encoder; > bool init_hdmi, init_dp, init_lspcon = false; > int max_lanes; > + enum pipe pipe; > > if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) { > switch (port) { > @@ -2885,7 +2886,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) > intel_encoder->type = INTEL_OUTPUT_DDI; > intel_encoder->power_domain = intel_port_to_power_domain(port); > intel_encoder->port = port; > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > + > + for_each_pipe(dev_priv, pipe) > + intel_encoder->crtc_mask |= BIT(pipe); > + > intel_encoder->cloneable = 0; > > intel_infoframe_init(intel_dig_port); > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 35c5299..a18d4b2 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -6205,11 +6205,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, > intel_encoder->power_domain = intel_port_to_power_domain(port); > if (IS_CHERRYVIEW(dev_priv)) { > if (port == PORT_D) > - intel_encoder->crtc_mask = 1 << 2; > + intel_encoder->crtc_mask = BIT(PIPE_C); > else > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); > } else { > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); > } > intel_encoder->cloneable = 0; > intel_encoder->port = port; > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c > index c3de091..07d3f58 100644 > --- a/drivers/gpu/drm/i915/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c > @@ -553,7 +553,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum > intel_encoder->type = INTEL_OUTPUT_DP_MST; > intel_encoder->power_domain = intel_dig_port->base.power_domain; > intel_encoder->port = intel_dig_port->base.port; > - intel_encoder->crtc_mask = 0x7; > + intel_encoder->crtc_mask = BIT(pipe); > intel_encoder->cloneable = 0; > > intel_encoder->compute_config = intel_dp_mst_compute_config; > diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c > index 754baa0..9de8615 100644 > --- a/drivers/gpu/drm/i915/intel_dvo.c > +++ b/drivers/gpu/drm/i915/intel_dvo.c > @@ -500,7 +500,7 @@ void intel_dvo_init(struct drm_i915_private *dev_priv) > intel_encoder->type = INTEL_OUTPUT_DVO; > intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; > intel_encoder->port = port; > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); > > switch (dvo->type) { > case INTEL_DVO_CHIP_TMDS: > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index bced7b9..75f2b7a 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -2124,11 +2124,11 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv, > intel_encoder->port = port; > if (IS_CHERRYVIEW(dev_priv)) { > if (port == PORT_D) > - intel_encoder->crtc_mask = 1 << 2; > + intel_encoder->crtc_mask = BIT(PIPE_C); > else > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); > } else { > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); > } > intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG; > /* > diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c > index ef80499..7b0f9519 100644 > --- a/drivers/gpu/drm/i915/intel_lvds.c > +++ b/drivers/gpu/drm/i915/intel_lvds.c > @@ -1026,11 +1026,11 @@ void intel_lvds_init(struct drm_i915_private *dev_priv) > intel_encoder->port = PORT_NONE; > intel_encoder->cloneable = 0; > if (HAS_PCH_SPLIT(dev_priv)) > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); > else if (IS_GEN4(dev_priv)) > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); > else > - intel_encoder->crtc_mask = (1 << 1); > + intel_encoder->crtc_mask = BIT(PIPE_B); > > drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); > connector->display_info.subpixel_order = SubPixelHorizontalRGB; > diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c > index 2b87648..3c568f6 100644 > --- a/drivers/gpu/drm/i915/intel_sdvo.c > +++ b/drivers/gpu/drm/i915/intel_sdvo.c > @@ -2697,7 +2697,7 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) > bytes[0], bytes[1]); > return false; > } > - intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > + intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); > > return true; > } > diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c > index b3dabc2..3b65197 100644 > --- a/drivers/gpu/drm/i915/intel_tv.c > +++ b/drivers/gpu/drm/i915/intel_tv.c > @@ -1542,9 +1542,9 @@ intel_tv_init(struct drm_i915_private *dev_priv) > intel_encoder->type = INTEL_OUTPUT_TVOUT; > intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; > intel_encoder->port = PORT_NONE; > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); > intel_encoder->cloneable = 0; > - intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1)); > + intel_encoder->base.possible_crtcs = BIT(PIPE_A) | BIT(PIPE_B); > intel_tv->type = DRM_MODE_CONNECTOR_Unknown; > > /* BIOS margin values */ > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, 2017-12-18 at 16:05 -0800, Rodrigo Vivi wrote: > On Wed, Dec 13, 2017 at 09:25:16AM +0000, Mika Kahola wrote: > > > > crtc_mask is defined explicitly defined for a certain number of > > pipes per > > platform. Let's generalize this in a way that crtc_mask dependens > > only on > > the number of pipes defined in device info. > > > > v2: Use BIT() macro wherever possible (Ville) > > Drop generalization for all other connectors except DDI (Ville) > > Fix DP-MST crtc mask to be dependent only on pipe (Ville) > > > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > > --- > > drivers/gpu/drm/i915/intel_crt.c | 4 ++-- > > drivers/gpu/drm/i915/intel_ddi.c | 6 +++++- > > drivers/gpu/drm/i915/intel_dp.c | 6 +++--- > > drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- > > drivers/gpu/drm/i915/intel_dvo.c | 2 +- > > drivers/gpu/drm/i915/intel_hdmi.c | 6 +++--- > > drivers/gpu/drm/i915/intel_lvds.c | 6 +++--- > > drivers/gpu/drm/i915/intel_sdvo.c | 2 +- > > drivers/gpu/drm/i915/intel_tv.c | 4 ++-- > > 9 files changed, 21 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_crt.c > > b/drivers/gpu/drm/i915/intel_crt.c > > index 9f31aea..9557e6e 100644 > > --- a/drivers/gpu/drm/i915/intel_crt.c > > +++ b/drivers/gpu/drm/i915/intel_crt.c > > @@ -951,9 +951,9 @@ void intel_crt_init(struct drm_i915_private > > *dev_priv) > > crt->base.type = INTEL_OUTPUT_ANALOG; > > crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << > > INTEL_OUTPUT_HDMI); > > if (IS_I830(dev_priv)) > > - crt->base.crtc_mask = (1 << 0); > > + crt->base.crtc_mask = BIT(PIPE_A); > > else > > - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << > > 2); > > + crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | > > BIT(PIPE_C); > if bit represents the pipe, why not to use for_each_pipe, like you > did bellow, > everywhere else? Ville commented that this change would only touch ddi and DP MST, hence the unchanged behavior here. Of course, instead of hard coding the BIT() macro was used. In fact, this could be changed something like this for_each_pip(dev_priv, pipe) crt->base.crtc_mask |= BIT(pipe); > > (random, maybe nonsense thought: maybe we end up even removing some > of if/else?!) > > > > > > > if (IS_GEN2(dev_priv)) > > connector->interlace_allowed = 0; > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c > > b/drivers/gpu/drm/i915/intel_ddi.c > > index 369f780..581a8b3 100644 > > --- a/drivers/gpu/drm/i915/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/intel_ddi.c > > @@ -2767,6 +2767,7 @@ void intel_ddi_init(struct drm_i915_private > > *dev_priv, enum port port) > > struct drm_encoder *encoder; > > bool init_hdmi, init_dp, init_lspcon = false; > > int max_lanes; > > + enum pipe pipe; > > > > if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) { > > switch (port) { > > @@ -2885,7 +2886,10 @@ void intel_ddi_init(struct drm_i915_private > > *dev_priv, enum port port) > > intel_encoder->type = INTEL_OUTPUT_DDI; > > intel_encoder->power_domain = > > intel_port_to_power_domain(port); > > intel_encoder->port = port; > > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); > > + > > + for_each_pipe(dev_priv, pipe) > > + intel_encoder->crtc_mask |= BIT(pipe); > > + > > intel_encoder->cloneable = 0; > > > > intel_infoframe_init(intel_dig_port); > > diff --git a/drivers/gpu/drm/i915/intel_dp.c > > b/drivers/gpu/drm/i915/intel_dp.c > > index 35c5299..a18d4b2 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -6205,11 +6205,11 @@ bool intel_dp_init(struct drm_i915_private > > *dev_priv, > > intel_encoder->power_domain = > > intel_port_to_power_domain(port); > > if (IS_CHERRYVIEW(dev_priv)) { > > if (port == PORT_D) > > - intel_encoder->crtc_mask = 1 << 2; > > + intel_encoder->crtc_mask = BIT(PIPE_C); > > else > > - intel_encoder->crtc_mask = (1 << 0) | (1 > > << 1); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | > > BIT(PIPE_B); > > } else { > > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | > > (1 << 2); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | > > BIT(PIPE_B) | BIT(PIPE_C); > > } > > intel_encoder->cloneable = 0; > > intel_encoder->port = port; > > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c > > b/drivers/gpu/drm/i915/intel_dp_mst.c > > index c3de091..07d3f58 100644 > > --- a/drivers/gpu/drm/i915/intel_dp_mst.c > > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c > > @@ -553,7 +553,7 @@ intel_dp_create_fake_mst_encoder(struct > > intel_digital_port *intel_dig_port, enum > > intel_encoder->type = INTEL_OUTPUT_DP_MST; > > intel_encoder->power_domain = intel_dig_port- > > >base.power_domain; > > intel_encoder->port = intel_dig_port->base.port; > > - intel_encoder->crtc_mask = 0x7; > > + intel_encoder->crtc_mask = BIT(pipe); > > intel_encoder->cloneable = 0; > > > > intel_encoder->compute_config = > > intel_dp_mst_compute_config; > > diff --git a/drivers/gpu/drm/i915/intel_dvo.c > > b/drivers/gpu/drm/i915/intel_dvo.c > > index 754baa0..9de8615 100644 > > --- a/drivers/gpu/drm/i915/intel_dvo.c > > +++ b/drivers/gpu/drm/i915/intel_dvo.c > > @@ -500,7 +500,7 @@ void intel_dvo_init(struct drm_i915_private > > *dev_priv) > > intel_encoder->type = INTEL_OUTPUT_DVO; > > intel_encoder->power_domain = > > POWER_DOMAIN_PORT_OTHER; > > intel_encoder->port = port; > > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | > > BIT(PIPE_B); > > > > switch (dvo->type) { > > case INTEL_DVO_CHIP_TMDS: > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c > > b/drivers/gpu/drm/i915/intel_hdmi.c > > index bced7b9..75f2b7a 100644 > > --- a/drivers/gpu/drm/i915/intel_hdmi.c > > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > > @@ -2124,11 +2124,11 @@ void intel_hdmi_init(struct > > drm_i915_private *dev_priv, > > intel_encoder->port = port; > > if (IS_CHERRYVIEW(dev_priv)) { > > if (port == PORT_D) > > - intel_encoder->crtc_mask = 1 << 2; > > + intel_encoder->crtc_mask = BIT(PIPE_C); > > else > > - intel_encoder->crtc_mask = (1 << 0) | (1 > > << 1); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | > > BIT(PIPE_B); > > } else { > > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | > > (1 << 2); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | > > BIT(PIPE_B) | BIT(PIPE_C); > > } > > intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG; > > /* > > diff --git a/drivers/gpu/drm/i915/intel_lvds.c > > b/drivers/gpu/drm/i915/intel_lvds.c > > index ef80499..7b0f9519 100644 > > --- a/drivers/gpu/drm/i915/intel_lvds.c > > +++ b/drivers/gpu/drm/i915/intel_lvds.c > > @@ -1026,11 +1026,11 @@ void intel_lvds_init(struct > > drm_i915_private *dev_priv) > > intel_encoder->port = PORT_NONE; > > intel_encoder->cloneable = 0; > > if (HAS_PCH_SPLIT(dev_priv)) > > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | > > (1 << 2); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | > > BIT(PIPE_B) | BIT(PIPE_C); > > else if (IS_GEN4(dev_priv)) > > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | > > BIT(PIPE_B); > > else > > - intel_encoder->crtc_mask = (1 << 1); > > + intel_encoder->crtc_mask = BIT(PIPE_B); > > > > drm_connector_helper_add(connector, > > &intel_lvds_connector_helper_funcs); > > connector->display_info.subpixel_order = > > SubPixelHorizontalRGB; > > diff --git a/drivers/gpu/drm/i915/intel_sdvo.c > > b/drivers/gpu/drm/i915/intel_sdvo.c > > index 2b87648..3c568f6 100644 > > --- a/drivers/gpu/drm/i915/intel_sdvo.c > > +++ b/drivers/gpu/drm/i915/intel_sdvo.c > > @@ -2697,7 +2697,7 @@ intel_sdvo_output_setup(struct intel_sdvo > > *intel_sdvo, uint16_t flags) > > bytes[0], bytes[1]); > > return false; > > } > > - intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << > > 2); > > + intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | > > BIT(PIPE_C); > > > > return true; > > } > > diff --git a/drivers/gpu/drm/i915/intel_tv.c > > b/drivers/gpu/drm/i915/intel_tv.c > > index b3dabc2..3b65197 100644 > > --- a/drivers/gpu/drm/i915/intel_tv.c > > +++ b/drivers/gpu/drm/i915/intel_tv.c > > @@ -1542,9 +1542,9 @@ intel_tv_init(struct drm_i915_private > > *dev_priv) > > intel_encoder->type = INTEL_OUTPUT_TVOUT; > > intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; > > intel_encoder->port = PORT_NONE; > > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); > > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); > > intel_encoder->cloneable = 0; > > - intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << > > 1)); > > + intel_encoder->base.possible_crtcs = BIT(PIPE_A) | > > BIT(PIPE_B); > > intel_tv->type = DRM_MODE_CONNECTOR_Unknown; > > > > /* BIOS margin values */
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 9f31aea..9557e6e 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -951,9 +951,9 @@ void intel_crt_init(struct drm_i915_private *dev_priv) crt->base.type = INTEL_OUTPUT_ANALOG; crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI); if (IS_I830(dev_priv)) - crt->base.crtc_mask = (1 << 0); + crt->base.crtc_mask = BIT(PIPE_A); else - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); if (IS_GEN2(dev_priv)) connector->interlace_allowed = 0; diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 369f780..581a8b3 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2767,6 +2767,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) struct drm_encoder *encoder; bool init_hdmi, init_dp, init_lspcon = false; int max_lanes; + enum pipe pipe; if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) { switch (port) { @@ -2885,7 +2886,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) intel_encoder->type = INTEL_OUTPUT_DDI; intel_encoder->power_domain = intel_port_to_power_domain(port); intel_encoder->port = port; - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + + for_each_pipe(dev_priv, pipe) + intel_encoder->crtc_mask |= BIT(pipe); + intel_encoder->cloneable = 0; intel_infoframe_init(intel_dig_port); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 35c5299..a18d4b2 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -6205,11 +6205,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, intel_encoder->power_domain = intel_port_to_power_domain(port); if (IS_CHERRYVIEW(dev_priv)) { if (port == PORT_D) - intel_encoder->crtc_mask = 1 << 2; + intel_encoder->crtc_mask = BIT(PIPE_C); else - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); } else { - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); } intel_encoder->cloneable = 0; intel_encoder->port = port; diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index c3de091..07d3f58 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -553,7 +553,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum intel_encoder->type = INTEL_OUTPUT_DP_MST; intel_encoder->power_domain = intel_dig_port->base.power_domain; intel_encoder->port = intel_dig_port->base.port; - intel_encoder->crtc_mask = 0x7; + intel_encoder->crtc_mask = BIT(pipe); intel_encoder->cloneable = 0; intel_encoder->compute_config = intel_dp_mst_compute_config; diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index 754baa0..9de8615 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c @@ -500,7 +500,7 @@ void intel_dvo_init(struct drm_i915_private *dev_priv) intel_encoder->type = INTEL_OUTPUT_DVO; intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; intel_encoder->port = port; - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); switch (dvo->type) { case INTEL_DVO_CHIP_TMDS: diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index bced7b9..75f2b7a 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -2124,11 +2124,11 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv, intel_encoder->port = port; if (IS_CHERRYVIEW(dev_priv)) { if (port == PORT_D) - intel_encoder->crtc_mask = 1 << 2; + intel_encoder->crtc_mask = BIT(PIPE_C); else - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); } else { - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); } intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG; /* diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index ef80499..7b0f9519 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -1026,11 +1026,11 @@ void intel_lvds_init(struct drm_i915_private *dev_priv) intel_encoder->port = PORT_NONE; intel_encoder->cloneable = 0; if (HAS_PCH_SPLIT(dev_priv)) - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); else if (IS_GEN4(dev_priv)) - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); else - intel_encoder->crtc_mask = (1 << 1); + intel_encoder->crtc_mask = BIT(PIPE_B); drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); connector->display_info.subpixel_order = SubPixelHorizontalRGB; diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 2b87648..3c568f6 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -2697,7 +2697,7 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) bytes[0], bytes[1]); return false; } - intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); + intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); return true; } diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index b3dabc2..3b65197 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c @@ -1542,9 +1542,9 @@ intel_tv_init(struct drm_i915_private *dev_priv) intel_encoder->type = INTEL_OUTPUT_TVOUT; intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; intel_encoder->port = PORT_NONE; - intel_encoder->crtc_mask = (1 << 0) | (1 << 1); + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B); intel_encoder->cloneable = 0; - intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1)); + intel_encoder->base.possible_crtcs = BIT(PIPE_A) | BIT(PIPE_B); intel_tv->type = DRM_MODE_CONNECTOR_Unknown; /* BIOS margin values */
crtc_mask is defined explicitly defined for a certain number of pipes per platform. Let's generalize this in a way that crtc_mask dependens only on the number of pipes defined in device info. v2: Use BIT() macro wherever possible (Ville) Drop generalization for all other connectors except DDI (Ville) Fix DP-MST crtc mask to be dependent only on pipe (Ville) Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- drivers/gpu/drm/i915/intel_crt.c | 4 ++-- drivers/gpu/drm/i915/intel_ddi.c | 6 +++++- drivers/gpu/drm/i915/intel_dp.c | 6 +++--- drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/intel_dvo.c | 2 +- drivers/gpu/drm/i915/intel_hdmi.c | 6 +++--- drivers/gpu/drm/i915/intel_lvds.c | 6 +++--- drivers/gpu/drm/i915/intel_sdvo.c | 2 +- drivers/gpu/drm/i915/intel_tv.c | 4 ++-- 9 files changed, 21 insertions(+), 17 deletions(-)