| Message ID | 20180103180618.18401-8-logang@deltatee.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Delegated to: | Herbert Xu |
| Headers | show |
On 1/3/2018 8:07 PM, Logan Gunthorpe wrote: > Clean up the extra ifdefs which defined the wr_reg64 and rd_reg64 > functions in non-64bit cases in favour of the new common > io-64-nonatomic-lo-hi header. > > Signed-off-by: Logan Gunthorpe <logang@deltatee.com> > Cc: Andy Shevchenko <andy.shevchenko@gmail.com> > Cc: Horia Geantă <horia.geanta@nxp.com> > Cc: Dan Douglass <dan.douglass@nxp.com> > Cc: Herbert Xu <herbert@gondor.apana.org.au> > Cc: "David S. Miller" <davem@davemloft.net> > --- > drivers/crypto/caam/regs.h | 26 +------------------------- > 1 file changed, 1 insertion(+), 25 deletions(-) > > diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h > index fee363865d88..ec6528e5ce9d 100644 > --- a/drivers/crypto/caam/regs.h > +++ b/drivers/crypto/caam/regs.h > @@ -10,7 +10,7 @@ > > #include <linux/types.h> > #include <linux/bitops.h> > -#include <linux/io.h> > +#include <linux/io-64-nonatomic-hi-lo.h> Typo: lo-hi should be used instead (see previous patch versions). Please add in the commit message the explanation (which was there in v8 but removed in v9): To be consistent with CAAM engine HW spec: in case of 64-bit registers, irrespective of device endianness, the lower address should be read from / written to first, followed by the upper address. Indeed the I/O accessors in CAAM driver currently don't follow the spec, however this is a good opportunity to fix the code. > > /* > * Architecture-specific register access methods > @@ -136,7 +136,6 @@ static inline void clrsetbits_32(void __iomem *reg, u32 clear, u32 set) > * base + 0x0000 : least-significant 32 bits > * base + 0x0004 : most-significant 32 bits > */ > -#ifdef CONFIG_64BIT > static inline void wr_reg64(void __iomem *reg, u64 data) > { > if (caam_little_end) Since the 2 cases (32/64-bit) are merged, caam_imx should be accounted for the logic to stay the same. This means for e.g. for wr_reg64 (similar for rd_reg64): static inline void wr_reg64(void __iomem *reg, u64 data) { if (!caam_imx && caam_little_end) iowrite64(data, reg); else iowrite64be(data, reg); } Thanks, Horia > @@ -153,29 +152,6 @@ static inline u64 rd_reg64(void __iomem *reg) > return ioread64be(reg); > } > > -#else /* CONFIG_64BIT */ > -static inline void wr_reg64(void __iomem *reg, u64 data) > -{ > - if (!caam_imx && caam_little_end) { > - wr_reg32((u32 __iomem *)(reg) + 1, data >> 32); > - wr_reg32((u32 __iomem *)(reg), data); > - } else { > - wr_reg32((u32 __iomem *)(reg), data >> 32); > - wr_reg32((u32 __iomem *)(reg) + 1, data); > - } > -} > - > -static inline u64 rd_reg64(void __iomem *reg) > -{ > - if (!caam_imx && caam_little_end) > - return ((u64)rd_reg32((u32 __iomem *)(reg) + 1) << 32 | > - (u64)rd_reg32((u32 __iomem *)(reg))); > - > - return ((u64)rd_reg32((u32 __iomem *)(reg)) << 32 | > - (u64)rd_reg32((u32 __iomem *)(reg) + 1)); > -} > -#endif /* CONFIG_64BIT */ > - > static inline u64 cpu_to_caam_dma64(dma_addr_t value) > { > if (caam_imx) >
On 04/01/18 12:25 AM, Horia Geantă wrote: >> +#include <linux/io-64-nonatomic-hi-lo.h> > Typo: lo-hi should be used instead (see previous patch versions). > > Please add in the commit message the explanation (which was there in v8 but > removed in v9): > To be consistent with CAAM engine HW spec: in case of 64-bit registers, > irrespective of device endianness, the lower address should be read from > / written to first, followed by the upper address. Indeed the I/O > accessors in CAAM driver currently don't follow the spec, however this > is a good opportunity to fix the code. Ok, well I just copied what the latest code did. I assumed that seeing it was cleaned up very recently that they would have done it correctly. >> >> /* >> * Architecture-specific register access methods >> @@ -136,7 +136,6 @@ static inline void clrsetbits_32(void __iomem *reg, u32 clear, u32 set) >> * base + 0x0000 : least-significant 32 bits >> * base + 0x0004 : most-significant 32 bits >> */ >> -#ifdef CONFIG_64BIT >> static inline void wr_reg64(void __iomem *reg, u64 data) >> { >> if (caam_little_end) > Since the 2 cases (32/64-bit) are merged, caam_imx should be accounted for the > logic to stay the same. Oops, my mistake. I'll fix this and the above and send a revised set. Logan
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index fee363865d88..ec6528e5ce9d 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -10,7 +10,7 @@ #include <linux/types.h> #include <linux/bitops.h> -#include <linux/io.h> +#include <linux/io-64-nonatomic-hi-lo.h> /* * Architecture-specific register access methods @@ -136,7 +136,6 @@ static inline void clrsetbits_32(void __iomem *reg, u32 clear, u32 set) * base + 0x0000 : least-significant 32 bits * base + 0x0004 : most-significant 32 bits */ -#ifdef CONFIG_64BIT static inline void wr_reg64(void __iomem *reg, u64 data) { if (caam_little_end) @@ -153,29 +152,6 @@ static inline u64 rd_reg64(void __iomem *reg) return ioread64be(reg); } -#else /* CONFIG_64BIT */ -static inline void wr_reg64(void __iomem *reg, u64 data) -{ - if (!caam_imx && caam_little_end) { - wr_reg32((u32 __iomem *)(reg) + 1, data >> 32); - wr_reg32((u32 __iomem *)(reg), data); - } else { - wr_reg32((u32 __iomem *)(reg), data >> 32); - wr_reg32((u32 __iomem *)(reg) + 1, data); - } -} - -static inline u64 rd_reg64(void __iomem *reg) -{ - if (!caam_imx && caam_little_end) - return ((u64)rd_reg32((u32 __iomem *)(reg) + 1) << 32 | - (u64)rd_reg32((u32 __iomem *)(reg))); - - return ((u64)rd_reg32((u32 __iomem *)(reg)) << 32 | - (u64)rd_reg32((u32 __iomem *)(reg) + 1)); -} -#endif /* CONFIG_64BIT */ - static inline u64 cpu_to_caam_dma64(dma_addr_t value) { if (caam_imx)
Clean up the extra ifdefs which defined the wr_reg64 and rd_reg64 functions in non-64bit cases in favour of the new common io-64-nonatomic-lo-hi header. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Horia Geantă <horia.geanta@nxp.com> Cc: Dan Douglass <dan.douglass@nxp.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> --- drivers/crypto/caam/regs.h | 26 +------------------------- 1 file changed, 1 insertion(+), 25 deletions(-)