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[03/27] drm/i915/icl: add icelake_init_clock_gating()

Message ID 20180109232336.11029-4-paulo.r.zanoni@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Zanoni, Paulo R Jan. 9, 2018, 11:23 p.m. UTC
For now it does nothing, except for avoiding a MISSING_CASE.

v2: Rebase.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

Joonas Lahtinen Jan. 10, 2018, 9:39 a.m. UTC | #1
On Tue, 2018-01-09 at 21:23 -0200, Paulo Zanoni wrote:
> For now it does nothing, except for avoiding a MISSING_CASE.
> 
> v2: Rebase.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

<SNIP>
 
> +static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
> +{
> +
> +}

Is this intentionally empty? If we don't foresee need for this in
future, we could factor it out at higher level.

Regards, Joonas
Zanoni, Paulo R Jan. 10, 2018, 6:42 p.m. UTC | #2
Em Qua, 2018-01-10 às 11:39 +0200, Joonas Lahtinen escreveu:
> On Tue, 2018-01-09 at 21:23 -0200, Paulo Zanoni wrote:
> > For now it does nothing, except for avoiding a MISSING_CASE.
> > 
> > v2: Rebase.
> > 
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> <SNIP>
>  
> > +static void icl_init_clock_gating(struct drm_i915_private
> > *dev_priv)
> > +{
> > +
> > +}
> 
> Is this intentionally empty? If we don't foresee need for this in
> future, we could factor it out at higher level.

It's not in this series, but there exist patches that add code to it.
To be sent soon.

Having the empty function here will make conflicts a little easier to
handle later.

> 
> Regards, Joonas
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1db79a860b96..66f70316ca5b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8423,6 +8423,11 @@  static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
 		   CNP_PWM_CGE_GATING_DISABLE);
 }
 
+static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
+{
+
+}
+
 static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
 {
 	u32 val;
@@ -8933,7 +8938,9 @@  static void nop_init_clock_gating(struct drm_i915_private *dev_priv)
  */
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 {
-	if (IS_CANNONLAKE(dev_priv))
+	if (IS_ICELAKE(dev_priv))
+		dev_priv->display.init_clock_gating = icl_init_clock_gating;
+	else if (IS_CANNONLAKE(dev_priv))
 		dev_priv->display.init_clock_gating = cnl_init_clock_gating;
 	else if (IS_COFFEELAKE(dev_priv))
 		dev_priv->display.init_clock_gating = cfl_init_clock_gating;